Samsung Electronics Co., Ltd.

Kyong Won An

Bio Kim

Young Jin Noh

Woo Jin Jang

Jun Kyu Yang

Woong Hee Lee

Joon Suk Lee

Woo Sung Lee

Hun Hyeong Lim

Chae Ho Kim

An integrated circuit memory device includes a vertical stack structure containing an interlayer insulating layer and a gate electrode, on a substrate. A blocking dielectric region is provided on a sidewall of an opening in the stack structure. A lateral impurity region is provided, which extends between the blocking dielectric region and the interlayer insulating layer and between the blocking dielectric region and the gate electrode. A lower impurity region is also provided, which extends between the blocking dielectric region and the substrate.

Integrated circuit memory devices having impurity-doped dielectric regions therein and methods of forming same

According to example embodiments, a method of fabricating a semiconductor device includes alternately stacking interlayer insulating layers and intermediate layers on a substrate, forming openings passing through the interlayer insulating layers and the intermediate layers to form recessed regions in the substrate, forming first epitaxial layers on recessed surfaces in the recessed regions, and forming second epitaxial layers using the first epitaxial layers as seed layers. The second epitaxial layers fill the recessed regions and extend above the substrate.

Semiconductor device, method of fabricating the semiconductor device, and method of forming epitaxial layer

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Seoul, South Korea

Kyong Won An