Samsung Electronics Co., Ltd.

Kyoil Koo

Sung-Min Hwang

Joon-Sung Lim

Jang-Gn Yun

Sunyoung Kim

Seungjin Lee

Hoosung Cho

Jaesun Yun

Sangtae Kim

Sooyong Lee

Dawoon Choi

Kang-Min Jung

Bong-Soo Kang

Cheol Ryou

Yunkyoung Song

A method for detecting a stochastic weak point of a layout pattern of a semiconductor integrated circuit includes: forming a semiconductor integrated circuit by exposing a wafer which is masked by a layout pattern and coated with a photoresist to light, and etching the circuit according to the layout pattern, calculating line edge roughness (LER) of the circuit, and calculating a variability constant for fitting the line edge roughness to a normal distribution from a polymer concentration value of the photoresist. The polymer concentration value is calculated from modeling the layout pattern, a total value of intensity of light reaching the photoresist, and an intensity value of light reaching one point of the photoresist. The method further includes calculating a probability distribution of the polymer concentration value of the layout pattern based on the variability constant, and calculating a stochastic weak point of the layout pattern from the probability distribution.

Method for detecting stochastic weak points of layout pattern of semiconductor integrated circuit and computer system performing the same

A method of fabricating a semiconductor device includes designing a layout, forming a photomask based on the layout, correcting an optical transmittance of the photomask, and performing a photolithography process using the photomask having the corrected optical transmittance to form a pattern on a substrate. The correcting the optical transmittance of the photomask includes creating an intensity map by capturing light that passes through the photomask, simulating the layout to create a virtual intensity map, and correcting an optical transmittance of a mask substrate of the photomask based on the intensity map and the virtual intensity map.

Method of fabricating a semiconductor device

Disclosed is a three-dimensional semiconductor memory device that includes first to third channel groups arranged in a first direction on a substrate. The first to third channel groups are spaced apart from each other along a second direction on the substrate. Each of the first to third channel groups includes a plurality of vertical channels that extend in a third direction perpendicular to a top surface of the substrate. The first and second channel groups are adjacent to each other in the second direction and spaced apart at a first distance in the second direction. The second and third channel groups are adjacent to each other in the second direction and are spaced apart at a second distance that is less than the first distance.

Three-dimensional semiconductor memory devices

Growing community of inventors

Hwaseong-si, South Korea

Kyoil Koo