Sony Corporation

Kyoichi Murakami

Tsutomu Niimura

Akira Yamakoshi

Takao Tsuchiya

Susumu Akazawa

Kenji Komori

Hiroshi Murayama

Atsushi Hirabayashi

Atsushi Iwamura

Takaaki Iwaki

Shinichirou Miyazaki

Takashi Okada

Masaaki Ishihara

Masaharu Tokuhara

Hirofumi Yuchi

Takahiko Tamura

Hiroaki Endo

Kiyoshi Ishihata

Yutaka Sonoda

Takeyo Nakagawa

A rear projection-type screen includes two sheet-like members having lenses prevented from being deformed and scratched. In the rear projection-type screen () for passing and focusing image light L emitted from an image light source (), two sheet-like members (a lenticular lens sheetand a Fresnel lens sheet) each made of a transparent material and having minute lenses () and () formed on at least one surface thereof are disposed such that their surfaces () and () with the lenses formed thereon confront each other, and a plurality of spacers (), (), . . . are disposed at appropriate spaced intervals between the confronting lenses of the two sheet-like members within an effective screen area () for passing and focusing the image light thereon.

Rear projection-type screen and rear projection-type image display device

The projector apparatus comprises an image signal processor for generating color drive signals of at least four channels, which correspond to at least four kinds of colors including the colors selected according to the spectrum of the light source, from the three primary color image signals; a light-splitting device for splitting the light from the light source into at least four kinds of lights according to the colors corresponding to the color drive signals generated in the image signal processor; light valves, each of which comprises a liquid crystal element driven by the color drive signal for modulating each of the light splitted from that of the light source by the light-splitting device; and a combining device for combining each of components of light modulated by the light valves.

Projector apparatus

An optical block which is light in weight and low in price, and has optical path distances equivalent to those obtained with glass has an outside form composed by arranging a polyhedron 8a having a surface of incidence for a blue ray B, a polyhedron 8b having a surface of incidence for a red ray R and a polyhedron 8c having a surface of incidence for a green ray G which are configured as transparent plastic members, and optical members 9a and 9b configured as dichroic filters formed as glass members. The polyhedrons 8a to 8c are coupled by way of the optical members 9a and 9b so as to compose an optical block as a monochromator prism block.

Optical block and liquid crystal projector

A raster distortion correcting signal synthesizer includes a multiplier, an adder, a memory for storing data and a coefficient, and a controller for controlling the multiplier, adder and memory in accordance with a count value of a horizontal sync. signal. The controller calculates a desired raster distortion correcting signal of a high order by utilizing the multiplier and adder on the basis of the count value, and multiplies the count value by a predetermined coefficient to obtain a new count value.

Raster distortion correcting signal synthesizer

A correction signal generating circuit for a television receiver includes a counter for counting a pulse synchronized with a horizontal sync signal, a memory for storing correction data and a coefficient, and a unit for multiplying and adding contents of the counter and the memory. A signal feedback loop supplies an output from the multiplying and adding unit to an input thereof, and a control unit controls operation of the memory and the multiplying and adding unit, thereby generating a correction signal.

Apparatus for generating television raster distortion correction signals

A stereo/monaural detection apparatus for detecting whether two-channel input audio signals are stereo or monaural, wherein the level difference between the input audio signals is calculated, and after the signal representing the level difference is discriminated with a predetermined hysteresis maintained, a stereo/monaural detection is performed in accordance with the result of such discrimination, thereby preventing an erroneous detection that may otherwise be caused by any level difference variation during a short time as in a case where the sound field is positioned at the center in the stereo signals. And the discrimination with the hysteresis is partially inhibited in response to the signal obtained by discriminating the level sum of the input audio signals at a predetermined reference level, hence preventing instability of the operation when the audio input level is extremely feeble.

Stereo/monaural detection apparatus

An operational amplifier circuit comprises a pair of emitter common transistors forming a differential amplifier circuit including a first conductivity type first and second transistors; a current mirror circuit including a second conductivity type third and fourth transistors having commonly connected bases and collectors which are connected with the first and second transistors, respectively and a second conductivity of fifth transistor having an emitter connected with the common bases and a base connected with the collector of the fourth transistor; and an output circuit including a second conductivity type sixth transistor having a base connected with the collector of the first transistor and a second conductivity type seventh transistor having a base connected with the emitter of the sixth transistor for outputting an output of the collector of the seventh transistor via a transistor buffer. The voltage between the collectors and the emitters of the first and second transistors of the emitter common transistor differential pair are equal to each other so that the current offset is reduced to improve the distortion factor characteristics.

Operational amplifier circuit

In a memory control apparatus for providing various video display functions by means of a video memory into which video data constituting successive units, such as, frames or fields, or video information are written at repeatedly changing write addresses while concurrently reading out the data from repeatedly changing read-out addresses; the video memory is provided with at least four memory areas each having a capacity to store one of the units of video information, impending overtaking of the write and read-out addresses relative to each other is detected, and, in response to such detection, the one of the memory areas in which the data is being written or read-out is changed so as to maintain a separation of the write and read-out addresses sufficient to ensure avoidance of overtaking and consequent disturbance of the displayed image.

Memory control apparatus

A signal converting circuit for converting a single-ended input signal to a pair of differential output signals includes a current source for generating a constant current; an input signal generating circuit for generating an input signal current; a first path including at least one diode connected to the current source and the input signal generating circuit for producing a first differential current as a function of the constant current and the input signal current; a second path including a series combination of a diode and the collector-emitter path of a transistor connected to the current source and the input signal generating circuit for producing a second differential current as a function of the constant current and the input signal current, the transistor being supplied with a current at its input; a differential amplifier output circuit having two transistors connected to the first and second paths for producing differential output signals in response to the first and second differential currents; and a circuit for eliminating the effect on the differential output signals of the current at the input of the transistor, the circuit for eliminating including a transistor having its collector-emitter path connected between the first path and ground and a diode connected between the second path and ground.

Circuit for converting single-ended input signals to a pair of

A signal converting circuit, which has particular application as a pedestal clamp circuit for a video signal, includes a differential amplifier having a pair of transistors which produce first and second differential currents at the respective collectors thereof; a first circuit supplied with the first differential current and including a diode and a first resistor having a first resistance value connected in series between the collector of one of the transistors of the differential amplifier and a reference potential; a second circuit supplied with the second differential current and including a second resistor having a second resistance value and a transistor having its collector emitter path connected in series with the second resistor between the collector of the other transistor of the differential amplifier and the reference potential; and an output circuit for producing an output current in response to the second differential current and including a current mirror transistor having its base-collector path connected in parallel with the collector-emitter path of the transistor of the second circuit, wherein the current gain of the signal converting circuit is controlled by the resistance values of the first and second resistors.

Circuit converting a pair of differential input signals to single-ended

A chrominance signal processing circuit for generating a gain-controlled chrominance signal carrier and a phase-controlled burst signal is provided with a first differential amplifier receiving a chrominance signal carrier and having a first constant current source, a second differential amplifier receiving an output signal of the first differential amplifier, a phase control circuit connected to the output of the second differential amplifier, the second differential amplifier receiving its bias current from a second constant current source during a chroma interval and from a third constant current source during a burst interval, the ratio of the currents of the first and second constant current sources being controlled for controlling the gain of the chrominance signal, and the output of the second differential amplifier being controlled at least during the burst interval, for controlling the phase of the burst signal.

Chrominance signal processing circuit

A circuit that is particularly adapted to convert a single-ended input signal to a pair of differential output signals. First and second series circuits are connected in parallel, the first series circuit being formed of first and second diodes and the second series circuit being formed of a third diode connected with the collector-emitter circuit of a transistor. The base electrode of the transistor is connected to the junction defined by the first and second diodes such that the base-emitter circuit thereof is in parallel arrangement with the second diode. A current source is connected to the parallel-connected series circuits so as to supply currents thereto. An input signal is supplied to the junction defined by the first and second diodes; the first and second outputs are coupled to this junction and to the collector electrode of the transistor, respectively, for providing differential output signal currents that are a function of the supplied signal. This circuit can be connected to a differential amplifier to supply differential signals to the latter, whereby a gain controlled amplification of the original single-ended input signal can be attained.

This invention is a phase inversion circuit of improved stability of operation for a master-slave flip-flop circuit. An additional gating circuit is controlled by two signals, one from an output of the slave flip-flop circuit and the other from an externally applied phase inversion signal. The output of the additional gating circuit is connected to the master flip-flop circuit through a circuit means that also receives a signal from the slave flip-flop output circuit. In the absence of inversion signals the circuit means controls the master flip-flop circuit from the slave flip-flop circuit and the master flip-flop circuit controls the slave flip-flop circuit with the assistance of the timing pulses in the usual manner. The phase inversion signal can be applied over a wide range of timing intervals of the timing circuit provided the inversion signal overlaps at least partly one of the timing pulses of the regular timing signal when the normal output signal of the slave flip-flop is a ' 0' and the normal output signal of the master flip-flop circuit is also a ' 0'.

Master-slave flip-flop circuit

A detector circuit for a color television receiver includes a pair of transistors whose collector-emitter circuits are connected in parallel with each other, an input circuit, such as a differential amplifier, for supplying a differential input signal to the base electrodes of the pair of transistors, an impedance element coupled between the collector electrodes of the pair of transistors and a voltage source, and an integration circuit for integrating a detected signal taken from the collector electrodes of the pair of transistors and thereby providing an output signal. A reference-voltage circuit is included to supply a reference voltage, which can be used as a threshold voltage, to the emitter electrodes of the pair of transistors. The detector circuit is advantageously used in the color demodulating circuit of a color television receiver, wherein an oscillator controlled by color burst signals supplies the input signal to the detector circuit, and the output thereof is used to control the gain of an ACC amplifier.

Detector circuit for color television receivers

An automatic chrominance control and color killer circuit for use in a color television receiver having a gain controllable chrominance amplifier for selectively amplifying chrominance signals and a color burst signal transmitted with a composite television signal during a color television transmission. The circuit further has a burst level detector connected to the chrominance amplifier, a control circuit including a time constant circuit connected to the burst level detector for deriving a control signal, which is supplied to the chrominance amplifier for controlling the gain thereof in response to the level of the control signal during the presence of the burst signal and for activating and inactivating the chrominance amplifier when the level of the control signal goes over and below a predetermined level, and a circuit connected between the burst level detector and the time constant circuit for shortening the time constant of the latter when the level of an output signal of the former goes below a predetermined level.

Growing community of inventors

Kanagawa, Japan

Kyoichi Murakami