Texas Instruments Corporation

Kyle P Hunt

William Robert Morrison

Asadd M Hosein

Binghua Hu

Xinfen Chen

Brian L Vialpando

Billy Alan Wofford

Neel A Bhatt

Leila Elvira Noriega

A method for semiconductor processing is provided wherein a workpiece having an underlying body and a plurality of features extending therefrom, is provided. A first set of the plurality of features extend from the underlying body to a first plane, and a second set of the plurality features extend from the underlying body to a second plane. A protection layer overlies each of the plurality of features and an isolation layer overlies the underlying body and protection layer, wherein the isolation has a non-uniform first oxide density associated therewith. The isolation layer anisotropically etched based on a predetermined pattern, and then isotropically etched, wherein a second oxide density of the isolation layer is substantially uniform across the workpiece. The predetermined pattern is based, at least in part, on a desired oxide density, a location and extension of the plurality of features to the first and second planes.

CMP process for processing STI on two distinct silicon planes

The disclosure provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming semiconductor features () over a substrate (), and then forming a layer of material () over the semiconductor features (). This method further includes selectively etching portions of the layer of material () based upon a density or size of the semiconductor features () located thereunder, and then polishing remaining portions of the layer of material ().

Method for selectively etching portions of a layer of material based upon a density or size of semiconductor features located thereunder

A method for effecting a finishing operation on a semiconductor workpiece situated in a finishing apparatus that includes a finishing tool configured for pressingly engaging the workpiece with a pressing force for abradingly removing material from the workpiece includes the steps of: (a) situating the finishing tool to operate against the workpiece; (b) operating the finishing tool with a pressing force to effect the abrading removal; (c) measuring at least one parameter associated with the finishing operation to determine at least one parametric value for the at least one parameter; (d) modulating the pressing force according to a predetermined relationship between the pressing force and the at least one parametric value; and (e) repeating steps (c) and (d) until the finishing operation is complete.

Method for effecting a finishing operation on a semiconductor workpiece

A chemical mechanical polishing method using a modified slurry. A modified slurry is used with high platen rotational speed and high wafer carrier rotation speeds. The endpoint of the polishing process is determined by monitoring the electrical current of the wafer carrier motor.

Method for chemical mechanical polishing using a high selective slurry

An improved slurry for polish removal. One application of this slurry is for shallow trench isolation processing in semiconductor manufacturing. The improved slurry has an enhanced oxide to nitride polish removal selectivity. A modified slurry is formed by mixing a polishing slurry with tetramethyl ammonium hydroxide and hydrogen peroxide. In an alternative embodiment, the modified slurry is formed by mixing a salt of tetramethyl ammonium with a base and with hydrogen peroxide to form the modified slurry. The improved slurry when used during the chemical mechanical polishing (CMP) step of an integrated shallow trench isolation manufacturing process allows the reverse pattern, etch and clean steps to be eliminated prior to CMP.

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Richardson, TX, United States of America

Kyle P Hunt