Texas Instruments Corporation

Kyle Mitchell Flessner

Tony Thanh Phan

Martin B Mollat

Eric W Beach

Jason Tervooren

Errol Philip Akomer

Arthur Pan

James Bright

Michelle R Keramidas

Karen Elizabeth Burks

Mohammad Nikpour

Milind V Khandekar

Connie Wang

A semiconductor device () comprising a leadframe with a pad () and elongated leads () made of a base metal plated with a layer enabling metal-to-metal bonding; a semiconductor chip () attached to the pad, the chip having terminals. A metallic wire connection () from a terminal to a respective lead, the connection including a first ball bond by a first squashed ball () attached to the terminal, and a first stitch bond () attached to the lead. A second squashed ball () of the wire metal attached to the lead as a second ball bond adjacent to the first stitch bond (). A package () of a polymeric compound encapsulating the chip, wire connection, second ball and at least a portion of the elongated lead, the compound adhering to the materials of the encapsulated entities.

Structure and method for diminishing delamination of packaged semiconductor devices

The invention provides a method for manufacturing an integrated circuit. The method, in one embodiment, includes inspecting a semiconductor wafer including a plurality of die for a defect, the inspecting providing an image of the semiconductor wafer including the defect. The method further includes identifying an area of the semiconductor wafer from the image, wherein the identified area encompasses at least those die including any portion of the defect, and dicing the semiconductor wafer into individual die. The die defined by the identified area, in this embodiment, are then discarded.

Method for manufacturing integrated circuits by guardbanding die regions

A method for manufacturing a semiconductor device that method comprises forming a thin film resistor by a process that includes depositing a resistive material layer on a semiconductor substrate. The process also includes depositing an insulating layer on the resistive material layer, and performing a first dry etch process on the insulating layer to form an insulative body. The process further includes performing a second dry etch process on the resistive material layer to form a resistive body. The resistive body and the insulative body have substantially identical perimeters.

Method to manufacture a thin film resistor

The present invention provides a method for analyzing critical defects in analog integrated circuits. The method for analyzing critical defects, among other possible steps, may include fault testing a power field effect transistor () portion of an analog integrated circuit () to obtain electrical failure data. The method may further include performing an in-line optical inspection of the analog integrated circuit () to obtain physical defect data, and correlating the electrical failure data and physical defect data to analyze critical defects.

Methods for analyzing critical defects in analog integrated circuits

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Lucas, TX, United States of America

Kyle Mitchell Flessner