Micron Technology Incorporated

Lodestar Licensing Group LLC

Kye Hyun Baek

Darwin A Clampitt

Anilkumar Chandolu

Christopher J Larsen

Tom Jibu John

Prakash Rau Mokhna Rau

S M Istiaque Hossain

Yoshiaki Fukuzumi

Paolo Tessariol

Richard J Hill

Jun Fujiki

Matthew J King

Kunal Shrotri

Shuji Tanaka

Umberto Maria Meotto

Sidhartha Gupta

Kyle A Ritter

Matthew Holland

An electronic device comprising lower and upper decks adjacent to a source. The lower and upper decks comprise tiers of alternating conductive materials and dielectric materials. Memory pillars in the lower and upper decks are configured to be operably coupled to the source. The memory pillars comprise contact plugs in the upper deck, cell films in the lower and upper decks, and fill materials in the lower and upper decks. The cell films in the upper deck are adjacent to the contact plugs and the fill materials in the upper deck are adjacent to the contact plugs. Dummy pillars are in a central region of the lower deck and the upper deck. The dummy pillars comprise an oxide material in the upper deck, the oxide material contacting the contact plugs and the fill materials. Additional electronic devices and related systems and methods are also disclosed.

Electronic devices comprising memory pillars and dummy pillars including an oxide material, and related systems and methods

A microelectronic device comprises a stack structure comprising a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, the stack structure divided into block structures separated from one another by slot structures, strings of memory cells vertically extending through the block structures of the stack structure, the strings of memory cells individually comprising a channel material vertically extending through the stack structure, an additional stack structure vertically overlying the stack structure and comprising a vertical sequence of additional conductive structures and additional insulative structures arranged in additional tiers, first pillars extending through the additional stack structure and vertically overlying the strings of memory cells, each of the first pillars horizontally offset from a center of a corresponding string of memory cells, second pillars extending through the additional stack structure and vertically overlying the strings of memory cells, and additional slot structures comprising a dielectric material extending through at least a portion of the additional stack structure and sub-dividing each of the block structures into sub-block structures, the additional slot structures horizontally neighboring the first pillars. Related microelectronic devices, electronic systems, and methods are also described.

Microelectronic devices including tiered stacks including conductive structures isolated by slot structures, and related electronic systems and methods

Growing community of inventors

Boise, ID, United States of America

Kye Hyun Baek