Integrant Technologies Inc.

Korea Advanced Institute of Science and Technology

Kwyro Lee

Bonkee Kim

Tae Wook Kim

Youngjin Kim

Ilku Nam

Iiku Nam

Junghwan Lee

Sunguk Kim

Yongseok Kim

Minsik Kim

Seunghyun Park

Jinbong Kim

Jinhyeok Baek

Hyouk-Kyu Cha

Yun Seong Eo

Dong Gu Lim

Seokbong Hyun

An infrared detector may be provided that includes: a micro-bolometer active cell which detects infrared and outputs a current signal; and a reference cell which includes a plurality of connected warm cells having the same structure and electrical characteristics as those of the micro-bolometer active cell, has the same electrical resistance value and average self-heating amount as those of the micro-bolometer active cell, and generates a reference current signal for the micro-bolometer active cell.

Infrared detector

The present invention relates to a differential amplifier and a mixer for improving the linearity. The differential amplifier circuit according to this present invention, includes first and second load stages each having a predetermined voltage value, a main differential amplifier unit having a first differential stage that forms a differential pair in such a way as to amplify a difference between a first input voltage and a second input voltage, and a constant current source, which has a predetermined current driving capability and is connected serially between a power source voltage terminal and a ground terminal, and a auxiliary differential amplifier unit having a second differential stage that forms a differential pair in such a way as to amplify a difference between a third input voltage and a fourth input voltage connected between the first load stage and a second load stage, and the ground, respectively.

Differential amplifier circuit and mixer circuit having improved linearity

The present invention relates to improved linearity of an active circuit, and more particularly, to an active circuit having improved linearity using a main circuit unit and an assistant circuit unit. According to the present invention, the common gate circuit includes a main circuit unit consisting of a common gate circuit having a drain terminal through which an input signal is output as an output signal, an assistant circuit unit having a common gate circuit in order to assist the linearity of the main circuit unit, a biasing unit for biasing the main circuit unit and the assistant circuit unit, respectively, and load stages connected to output stages of the main circuit unit and the assistant circuit unit, wherein the output stages of the main circuit unit and the assistant circuit unit are coupled to each other.

Active circuit having improved linearity using multiple gated transistor

The present invention relates to a filter, and more particularly, to a tracking filter for selecting a channel of a wideband frequency. The tracking filter for selecting a channel of a wideband frequency, which is for increasing the selectivity of a wideband frequency, includes: a first tracking portion for filtering and amplifying a specific frequency band while converting a low input impedance of the input terminal of the tracking filter into a high impedance; a second tracking portion for maintaining the high impedance of the first tracking portion, and for filtering and amplifying the specific frequency band while increasing the selectivity Q of a frequency outputted from the first tracking portion; and a third tracking portion for filtering the specific band wherein has low input impedance and high output impedance.

Tracking filter for selecting channel of wideband frequency

Disclosed is a high linearity programmable gain amplifier using a switch, including an attenuating portion for controlling a gain of a signal and an amplifying portion having a first amplifying part and a second amplifying part, for amplifying an input signal and outputting a signal amplified, wherein the first amplifying part has a first amplifier for amplifying an input signal and a first switch for activating the first amplifier and the second amplifying part has a second amplifier for amplifying an input signal and a second switch for activating the second amplifier.

High linearity programmable gain amplifier using switch

An amplifier circuit improved in linearity and frequency band comprises an amplification block, a feedback block and an output block. The amplification block comprises a main transistor, an auxiliary transistor, a first capacitor, a second capacitor, a main transistor bias unit, and an auxiliary transistor bias unit. The main transistor bias unit comprises a first bias resistor. The auxiliary transistor bias unit comprises a second bias resistor. The feedback block comprises first and second feedback resistors, and the output block comprises an output resistor and an output transistor.

Amplifier circuit improved in linearity and frequency band

Disclosed herein is an amplifier circuit having improved linearity and frequency band using a MGTR. The amplifier circuit comprises an amplification unit including a main transistor and an auxiliary transistor, an attenuation unit including inductors respectively connected to the source of the main transistor and the source of the auxiliary transistor, a capacitor connected at one end thereof to the sources of the main transistor and auxiliary transistor and connected at the other end thereof to the gates of the main transistor and auxiliary transistor, and an output unit connected to the drains of the main transistor and auxiliary transistor.

Amplifier circuit having improved linearity and frequency band using multiple gated transistor

A mixer circuit with improving characteristic of image rejection by compensating mismatch in a spurious rejection mixer circuit (SRM) used in a transmitter is provided. The mixer circuit according to the present invention comprises an up conversion unit for modulating a base-band input signal to a RF signal, a down conversion unit for converting an output signal from the up conversion unit to a base-band output signal, mismatch estimating means for determining a mismatch compensation value by which spurious component in an output signal from the down conversion unit is minimized, wherein the spurious component results from mismatch in the up conversion unit, and mismatch compensating means for compensating the mismatch in the up conversion unit by using the mismatch compensation value determined by the mismatch estimating means.

Mixer circuit with spurious rejection by using mismatch compensation

This invention is about the direct conversion receiver. It is excellent the receiving sensitivity that DC off-set, matching characteristics of the relationship of I/Q circuits and noise characteristics are improved. In order to achieve this purpose, the direct conversion receiver uses vertical bipolar junction transistor available in standard triple-well CMOS technology in the switching element of mixer and base-band analog circuits. Furthermore, as using the passive mixer in the other practical example of this invention, this invention controls the occurrence of l/f noise. As using the vertical bipolar junction transistor available in standard triple-well CMOS in the base-band analog circuits, this invention realizes the direct conversion receiver that DC off-set, matching characteristics of the relationship of I/Q circuit and noise characteristics are improved.

Direct conversion receiver using vertical bipolar junction transistor available in deep n-well CMOS technology

The present invention relates to improvement of even order distortion noise, DC offset, and non-linearity of mixer circuits. According to the present invention, a mixer circuit is provided, which comprises a splitter for splitting an input signal to the first and second signal having phase difference of 180 degree, a local oscillator, first mixer for mixing the first signal with the local oscillation signal, second mixer for mixing the second signal with the local oscillation signal, and subtractor for subtracting the output of the second mixer from the output of the first mixer.

Mixer circuit having improved even order noise, DC offset, and linearity characteristic

An image rejection mixer (IRM) for rejecting signals having image frequency and, more particularly, a mixer for rejecting signals of image frequency by using mismatch compensation is provided. The image rejection mixer comprises: first and second mixers; first and second converting means, each of which transforms each output of the first and second mixers to digital signal; third and fourth mixers, each of which mixes output of the first converting means with each of second local oscillation in-phase signal and quadrature-phase signal, respectively; fifth and sixth mixers, each of which mixes output of the second converting means with each of second local oscillation in-phase signal and quadrature-phase signal, respectively; means for subtracting; means for adding; and means for compensating gain-mismatch between the first and second mixers.

Image rejection mixer with mismatch compensation

The present invention is related to a variable gain low noise amplifier that optimizes input matching, gain and noise characteristics, and linearity. The variable gain low noise amplifier according to an embodiment of the present invention includes a first amplifying cell that operates in a high gain mode, a second amplifying cell that operates in a low gain mode, a selectively matching circuit, and a first short-circuit means. The variable gain low noise amplifier according to the present invention selects the best operation in each gain mode so that the circuit operated in high and low gain modes does not affect a load of another circuit.

Variable gain low noise amplifier

The present invention relates to an OTP ROM using a CMOS gate oxide antifuse. According to an embodiment of the present invention, in an OTP ROM cell having a first input terminal, a second input terminal and a third input terminal, wherein the OTP ROM stores data by means of a voltage applied to the first to third input terminals, the OTP ROM cell includes a cell access transistor having a gate and drain forming the second input terminal and a source forming the first input terminal, wherein the cell access transistor is activated by a voltage applied to between the gate and source, a high-voltage blocking transistor having a gate, a drain and a source connected to the drain of the cell access transistor, wherein the high-voltage blocking transistor allows the current to flow from the drain to the source by means of a bias voltage applied to the gate, thus blocking the high voltage applied to the third input terminal from being directly applied to the cell access transistor, and an antifuse transistor having a gate forming the third input terminal, and source and drain both of which are connected to each other and are then connected to the drain of the high-voltage blocking transistor, wherein a high voltage is applied to the third input terminal and if the cell access transistor is activated, gate oxide is broken and shorted.

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Daejeon, South Korea

Kwyro Lee