International Business Machines Corporation

Kwok-Ken Mak

Charles Otto Schulz

David Har

Michael Edward Wazlowski

Kenneth Blair Ocheltree

T Basil Smith, Iii

R Brett Tremaine

Lorraine Maria Herger

Tu-Chih Tsai

In a processing system having a main memory, wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies, a method and apparatus for providing compressed data integrity verification to insure detection of nearly any data corruption resulting from an anomaly anywhere in the logical processing or storage of compressed information. A cyclic redundancy code (CRC) is computed over a compressed data block as the data enters the compressor hardware, and the CRC is appended to the compressor output block before it is stored into the main memory. Subsequent read access results in comparing the CRC against a recomputation of the CRC as the block is uncompressed from the main memory. Any CRC miscompare implies an uncorrectable data error condition that may be used to interrupt the system operation.

Method and apparatus for high integrity hardware memory compression

A highly-efficient system and methodology for organizing, storing and/or transmitting compressed data that achieves optimum compression throughput, enhances overall data compressibility, and reduces decompression latency.

Highly-efficient compression data format

System and method for efficiently merging compressed data

A method of maintaining cache coherency in a computer system including two or more processors sharing information, the processors coupled by two or more interconnects to a memory such that the processors are not directly coupled to the same is disclosed interconnect is disclosed. The method of maintaining cache coherency includes the steps of: accessing and sharing, by a first processor and a second processor, information from the memory and setting path indicators in directories associated with at least two of the interconnects on a respective first and second access path to the memory, and storing the information in respective associated first and second caches; and writing a new value to the information, by a writing processor sharing the information, the writing step including the steps of: invalidating other copies of the information via the path indicators; acquiring exclusive access to the information by changing the path indicators to an exclusive state; and writing the new value to the information, in response to the acquiring step.

System and method for maintaining cache coherency using path directories

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Wappingers Falls, NY, United States of America

Kwok-Ken Mak