National Semiconductor Corporation

National Semiconductor Corportaion

Kwok-Fu Chiu

Don Roy Sauer

Faruk Jose Nome Silva

Barry James Culpepper

Michael Jon Wurtz

Michael E Haslam

Yih-Chyi Chong

Described herein is technology for, among other things, short-circuit protection. The technology involves sensing a current that is based on an output current and generating a current sense signal in response. The technology further involves buffering the current sense signal. The technology further involves limiting the output current when it exceeds a threshold value.

Short circuit protection with reduced offset voltage

Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region.

Circuitry including matched transistor pairs

A synchronous switching voltage regulator circuit is provided. After the first PWM pulse or at the end of a soft-start, a gradual transition is made from asynchronous rectification to fully synchronous rectification. The gradual transition to synchronous rectification is made by gradually increasing the time that the synchronous switch is enabled to be on.

Apparatus and method for start-up for a synchronous switching regulator

An offset voltage temperature coefficient reduction system for a differential operational amplifier is disclosed. In one embodiment, the offset voltage temperature coefficient reduction system comprises a first current source generating a first current with a positive temperature coefficient and a second current source generating a second current with a negative temperature coefficient, where the first current source and the second current source are coupled to their respective output nodes of the differential op amp such that an error due to an input offset voltage of the differential operational amplifier is approximately constant over a range of temperature, and where a difference between the first current and the second current is approximately zero at a reference temperature. In similar manner, the offset voltage temperature coefficient can be also adjusted to desired value other than zero.

Adjustment of op amp offset voltage temperature coefficient

Described herein is technology for, among other things, input bias current cancellation. The technology includes a bipolar differential pair coupled with a supply voltage (V). The bipolar differential pair includes a first transistor and a second transistor. The technology further includes an input bias current cancellation circuit coupled with the bipolar differential pair and including a third transistor. The third transistor has a collector-emitter voltage V, and the bipolar differential pair is operable to receive an input voltage greater than V&#x2212;2Vwithout causing the third transistor to operate in the saturation region.

Wide input common mode for input bias current cancellation

An integrated circuit includes an oscillator circuit, where a frequency of an oscillator output signal provided by the oscillator circuit is adjustable by either coupling a resistor to an input pin, or by applying an external clock signal to the input pin. The oscillator circuit includes a comparator, a follower, a current-controlled oscillator, and a switch circuit. The switch circuit is coupled between the input pin and a node that is coupled to the current-controlled oscillator. Also, the follower is arranged to cause the voltage at the node to be at a pre-defined voltage unless the voltage at the node is overdriven by an external clock signal. The comparator circuit is arranged to determine whether the signal at the input pin is a clock signal. If it is determined that the signal at the input pin is a clock signal, the switch circuit is opened.

Apparatus and method for dual features of frequency setting and frequency synchronization in one pin

A controller for a synchronous switching regulator is arranged to control a switch with a control signal, and to control a synchronous switch with a synchronous switch control signal. The controller disables the synchronous switch control signal at power-up so that the regulator operates with asynchronous rectification. Also, the controller is arranged to detect whether the regulator is in discontinuous or continuous conduction mode by determining whether a switch node voltage at the switch node a switch node stays negative. The regulator keeps operating with asynchronous rectification until the switch node voltage stays negative for the entire off period of the switch, which indicates the regulator is operating in continuous conduction mode. At this point, the controller enables assertion of the synchronous switch control signal, so that the regulator operates with synchronous rectification. The controller is arranged to enable the output voltage to rise monotonically when driving a prebiased load.

Apparatus and method for monotonic start up of a synchronous switching regulator

A method and apparatus is directed to generating an improved temperature coefficient for the current limit in a switching regulator/driver circuit. The current limit sense circuit includes a comparator that compares two signals to determine when the current limit has been exceeded. One signal is produced from a temperature independent voltage source, a trans-conductance cell, and a sensor resistor circuit. Another signal is produced by an active output circuit, such that the signal corresponds to the current associated with the switching regulator/driver circuit. The current sensed by the regulator/driver is temperature dependent due to the resistances in the active output circuit, the sensor resistor circuit, and the trans-conductance cell. Each of these resistances has a temperature coefficient. The temperature coefficients determine the amount of temperature dependence in the sensed switching/regulator current. The resistance materials are chosen such that the temperature dependence of the sensed current is minimized.

Very low temperature coefficient for current limit in switching regulator and driver

A circuit is provided which generates a reference bias current using a difference in base-emitter voltages of two bipolar transistors imposed across a source terminal and a drain terminal of an MOS transistor. The circuit includes a circuit for compensating shifts in threshold voltage, and thus shifts in the current flowing therein, of the MOS transistor. In one embodiment, the bias circuit is configured to achieve superior efficiency in generating small bias currents. In another embodiment, the bias circuit is configured to operate using minimal voltage supplies. In all embodiments, the reference bias current generated thereby has a positive temperature coefficient and is substantially independent of process variations.

Low power bias circuit using FET as a resistor

An output stage of a CMOS comparator is designed to have a limited short circuit current, while maintaining maximum output voltage swing and a low quiescent current. The output stage includes a reference voltage generation circuit, which generates a gate voltage at the output transistor of limited range, so that the short circuit current of the output transistor is limited. In one embodiment, the reference voltage is generated by a plurality of serially connected diodes.

Output circuit with short circuit protection for a CMOS comparator

An AB Cascode amplifier provides low quiescent current operation, while maintaining the high gain and wide bandwidth of prior art folded cascode amplifier. Instead of fixed current sources, the AB cascode amplifier uses variable current sources, which are biased by a fixed small current source and two variable biased transistor.

'AB Cascode' amplifier in an input stage of an amplifier or comparator

An improved input protection circuit receiving a differential signal has a small signal input circuit and a large signal input circuit. The small signal input circuit is active when the differential input signal has a magnitude not exceeding a predetermined value. The large signal input circuit is active when the differential input signal has a magnitude exceeding the predetermined value. Because the small signal input circuit does not see a large differential signal across the gate terminals of its input transistors, offset voltage ('V.sub.os ') drift is avoided resulting in enhanced circuit reliability. A switch circuit isolates the small signal input circuit when the large signal input circuit is active.

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San Jose, CA, United States of America

Kwok-Fu Chiu