Samsung Display Co., Ltd.

Samsung Display Sdi Co., Ltd.

Kwangsae Lee

Kimyeong Eom

Jihyun Ka

Hwayoung Song

Ji-Hyun Ka

Minku Lee

Nackhyeon Keum

Ki Myeong Eom

Seungwoo Sung

Sukyoung Kim

Sang-min Lim

Dong Eup Lee

Seungji Cha

Il-joo Kim

Taegeun Kim

Jeonggeun Yoo

Hae-yeon Lee

Young Woo Choi

A display panel includes: first to N-th active pixels, N being an integer greater than 3; and a dummy pixel arranged adjacent to the N-th active pixel in a same pixel column, the dummy pixel including: a dummy driving transistor including a gate electrode connected to a first node, a first electrode connected to a data line configured to transmit a data voltage, and a second electrode connected to a second node; a plurality of dummy compensation transistors connected in parallel to each other between the first node and the second node; a dummy initialization transistor including a gate electrode configured to receive an initialization gate signal, a first electrode configured to receive an initialization voltage, and a second electrode connected to the first node; and a dummy storage capacitor including a first electrode configured to receive a first supply voltage and a second electrode connected to the first node.

Display panel and display device including the same

A display device includes: a substrate including a display area, a peripheral area surrounding the display area, a hole area positioned inside the display area, and a pad area; a crack detection line including a first part in the pad area and extending to the peripheral area and a second part connected to the first part, disposed to surround the hole area, and extending to the pad area; a printed circuit board in the pad area; first transistors in the pad area and connected in series between the printed circuit board and the first part, where each of gate electrodes of the first transistors is connected to a first signal line; and second transistors in the pad area and connected in series between a constant voltage line and the first part, where each of gate electrodes of the second transistors is connected to a second signal line.

Display device

Provided is a gate driver including a plurality of stages, wherein each stage includes an output unit including a pull-up transistor and a pull-down transistor, and a second node controller configured to control a voltage of a second control node to which a gate of the pull-up transistor is connected, wherein the second node controller includes a first control transistor connected between the first clock terminal and the second control node and including a gate connected to the first control node, and a second control transistor including a gate connected to the gate of the first control transistor and configured to control a short circuit between the first clock terminal and a second clock terminal.

Gate driver and display apparatus including same

A display panel including a substrate including a display area surrounding an opening area and a non-display area between the opening area and the display area; a plurality of display elements on the display area; a plurality of scan lines extending in a first direction and detouring around an edge of the opening area; a plurality of data lines extending in a second direction that intersects with the first direction, the plurality of data lines detouring around the edge of the opening area; and a plurality of emission control lines extending in the first direction and detouring around the edge of the opening area.

Display panel

A display panel test circuit includes a first transistor connected to a first data line and receiving a red lighting test signal, a second transistor connected to the first data line and receiving a blue lighting test signal, a third transistor connected to a second data line and receiving a first green lighting test signal, a fourth transistor connected to a third data line and receiving the red lighting test signal, a fifth transistor connected to the third data line and receiving the blue lighting test signal, a sixth transistor connected to a fourth data line and receiving a second green lighting test signal, a seventh transistor connected to the second data line and receiving a crack test signal, and an eighth transistor connected to the fourth data line and receiving the crack test signal. The display panel test circuit performs one or more tests on a display panel.

Display panel test circuit

A display panel includes a substrate including a first non-display area surrounding a transmission area, a display area on an outer portion of the first non-display area, and a second non-display area surrounding the display area, driving thin film transistors and display elements in the display area, a first power supply line in the second non-display area and extending in a first direction, first driving voltage lines and second driving voltage lines extending in a second direction intersecting with the first direction and spaced apart from each other with the transmission area therebetween, and a power bus line connected to the second driving voltage lines in the first non-display area or second non-display area, the power bus line extending in the first direction. A length of the power bus line in the first direction is less than a length of the first power supply line in the first direction.

Display panel having power bus line with reduced voltage drop

An organic light emitting diode ('OLED') display device includes a substrate having a display region including a light emitting region and a peripheral region, and a pad region located in one side of the display region, a plurality of light emitting structures on the substrate in the light emitting region, and a plurality of fan-out wirings including a low fan-out wiring in the peripheral region on the substrate, a middle fan-out wiring on the low fan-out wiring, the middle fan-out wiring overlapping at least a portion of the low fan-out wiring, and an upper fan-out wiring on the middle fan-out wiring, the upper fan-out wiring overlapping at least a portion of the low fan-out wiring.

Organic light emitting diode display device

An electronic panel including: a base substrate including a first area and a second area, wherein the first area includes a module area and a display area adjacent to the module area; a display element layer including a plurality of display elements, wherein the plurality of display elements overlaps the first area; an encapsulation layer configured to cover the display elements; sensing patterns overlapping the first area and disposed on the encapsulation layer; a crack sensing pattern overlapping the module area and disposed on the encapsulation layer; an auxiliary pattern overlapping the module area and disposed on the encapsulation layer, wherein the auxiliary pattern has a shape that extends along an edge of the crack sensing pattern and extends between the sensing patterns and the crack sensing pattern; and a signal line disposed on the encapsulation layer to electrically connect the crack sensing pattern to the auxiliary pattern.

Electronic panel and electronic apparatus including the same

Display panel having an opening arranged inside a display area

A display apparatus includes a display panel including a plurality of scan lines and a plurality of pixels connected to the plurality of scan lines, and a scan driving unit to supply a scan signal to each of the plurality of pixels via the plurality of scan lines, the scan driving unit including a scan signal generation unit to generate the scan signal supplied to each of the plurality of scan lines, and a plurality of buffers respectively corresponding to the plurality of scan lines, each one of the plurality of buffers outputting a scan signal to a corresponding one of the plurality of scan lines, wherein each of the plurality of buffers includes a transistor having a size corresponding to a load of a circuit connected to an output end of a corresponding buffer.

Scan driving apparatus and display apparatus including the same

Provided is an organic light emitting display device including: a display unit including a plurality of pixels, each pixel of the pixels including an organic light emitting diode; and a test circuit configured to apply a first signal and a second signal to the display unit and to receive a third signal from the display unit. The test circuit is configured to determine whether or not the display unit is in a normal state based on a voltage level of the third signal when the first and second signals have a first level.

Organic light emitting display device and method of testing the same

A display panel includes a display pixel displaying an image in response to a common voltage and a data voltage and a sensing pixel outputting a feedback voltage in response to the common voltage and a reference voltage; and a driving circuit unit supplying the data voltage and the reference voltage to the display pixel and the sensing pixel, respectively. The driving circuit unit includes a common voltage estimating part comparing the reference voltage and the feedback voltage to generate a counter signal having a counter value that is stepwise varied according to the comparing of the reference voltage and the feedback voltage; and a common voltage adjusting part stepwise varying the common voltage supplied to the display panel in response to the counter value.

Growing community of inventors

Asan-si, South Korea

Kwangsae Lee