Samsung Electronics Co., Ltd.

Kwangjin Lee

Jaehyun Lim

Hye-Jin Kim

Daewon Ha

Inho Choi

Younghwan Park

Jung Hyuk Lee

Jung Sunwoo

Daehwan Kang

Beakhyung Cho

Gitae Jeong

Hyuntaek Choi

Cheaouk Lim

Woo-Yeong Cho

Jeongho Lee

Kwangho Kim

Youngkwang Yoo

Joonmin Park

Hee Hyun Nam

Yong-Jun Lee

Qi Wang

Yu-hwan Ro

Jaeho Shin

Taek-Sung Kim

Hyunjong Moon

Wooyeong Cho

Dueung Kim

Hyunho Choi

JeongHo Lee

Dongha Lee

Hyungrok Oh

Byunggil Choi

Junsoo Bae

A host system includes a volatile memory device configured to store first temporary data, an embedded storage device configured to store second temporary data, and a host device configured to determine whether to transmit new temporary data to the nonvolatile memory device for storage therein as the first temporary data or to the embedded storage device for storage therein as the second temporary data in response to a detection signal of an event associated with the new temporary data. The embedded storage device may include at least one nonvolatile memory device having a buffer area, in which the second temporary data is stored, and a user area, and a controller configured to control the at least one nonvolatile memory device such that the second temporary data in the buffer area is copied to the user area in response to a flush request of the host device.

Embedded storage device, host system having the same, and method of operating the same

A fingerprint sensor package includes: a first substrate including a core insulating layer including a first surface and a second surface and a through-hole, a first bonding pad on the second surface, and an external connection pad between an edge of the second surface and the first bonding pad; a second substrate in the through-hole and including a third surface and a fourth surface, and including first sensing patterns on the third surface, spaced apart in a first direction, and extending in a second direction, second sensing patterns spaced apart from each other in the second direction and extending in the first direction, and a second bonding pad on the fourth surface; a conductive support electrically connecting the first bonding pad and the second bonding pad and supporting the first substrate and the second substrate; a controller chip on the second substrate; and a molding layer on the second surface.

Fingerprint sensor package and smart card having the same

A fingerprint sensor package includes a first substrate including a core insulating layer; a first bonding pad on the core insulating layer; and an external connection pad between an edge of the second surface of the core insulating layer and the first bonding pad, a second substrate on the core insulating layer, the second substrate including: a plurality of first sensing patterns spaced apart in a first direction and extending in a second direction intersecting with the first direction; a plurality of second sensing patterns spaced apart from each other in the second direction and extending in the first direction; and a second bonding pad, a conductive wire connecting the first bonding pad to the second bonding pad; a controller chip on the second substrate; and a molding layer covering the second substrate and the first bonding pad and spaced apart from the external connection pad.

Fingerprint sensor package and smart card including the same

Disclosed is a method of performing, at a controller, an access to a memory device, which includes transmitting, at the controller, a first command signal, a first address signal, and a first swizzling signal to the memory device, selecting first data bits stored in a memory cell array of the memory device based on the first command signal and the first address signal, and sequentially outputting, at the memory device, at least a part of the first data bits to the controller in a burst manner, based on the first swizzling signal.

Semiconductor memory device and operation method of swizzling data

A writing method for a non-volatile memory device includes; performing a sensing operation, comparing write data with read data retrieved by the sensing operation, determining whether the write data is set state when the write data and the read data are the same, performing a set operation when the write data is set state, and not performing a write operation when the write data is not set data.

Non-volatile resistive memory device including a plurality of write modes

A fingerprint sensor package includes a package substrate including an upper surface in which a sensing region and a peripheral region surrounding the sensing region are defined, and a lower surface facing the upper surface; a plurality of first sensing patterns located are arranged in the sensing region, are apart from each other in a first direction, and extend in a second direction crossing the first direction; a plurality of second sensing patterns that are arranged in the sensing region, are apart from each other in the second direction, and extend in the first direction; a coating member covering the sensing region; an upper ground pattern in the peripheral region and apart from the coating member to surround the coating member in the first and second directions; and a controller chip on the lower surface of the package substrate; and a plurality of capacitors.

Fingerprint sensor package and smartcard including the same

A memory device includes a plurality of memory cells, each memory cell including a switching element and a data storage element having a phase change material, and each memory cell connected to one of a plurality of wordlines and to one of a plurality of bitlines, a decoder circuit configured to determine at least one of the plurality of memory cells as a selected memory cell, and a programming circuit configured to input a program current to the selected memory cell to perform a program operation, to detect a holding voltage of the selected memory cell, and to adjust a magnitude of the program current based on the detected holding voltage. The selected memory cell is turned off when a voltage across the selected memory cell is lower than the holding voltage.

Memory device having program current adjustible based on detected holding voltage

A neuromorphic device, including a controller configured to generate ternary data by converting each bit of binary data into a ternary bit; and a memory device configured to store the ternary data, wherein the memory device includes: a first memory cell array including first memory cells formed between lower word lines and bit lines, wherein a first memory cell of the first memory cells includes a first switching element and a first resistive element; and a second memory cell array including second memory cells formed between upper word lines and the bit lines, wherein a second memory cell of the second memory cells includes a second switching element and a second resistive element, and wherein each bit of the ternary data is identified by a combination of a data bit stored in the first memory cells and a mask bit stored in the second memory cells.

Three-dimensional neuromorphic device including switching element and resistive element

Provided is a semiconductor memory device. The semiconductor memory includes a main area and a redundancy area. The main area includes a plurality of memory blocks sharing a write bit line and a read bit line. The redundancy area includes a plurality of redundancy memory blocks sharing a redundancy write bit line and a redundancy read bit line. The redundancy area is provided to replace a component in the main area having a defect.

Semiconductor memory device having a redundancy area

In one embodiment, the semiconductor device includes a non-volatile memory cell array, a write circuit configured to write to the non-volatile memory cell array, and a control circuit. The control circuit is configured to store at least one erase indicator. The erase indicator is associated with at least a portion of the non-volatile memory cell array and indicates a logic state. The control circuit is configured to control the write circuit to write the logic state indicated by the erase indicator in the non-volatile memory cell array during an erase operation of the associated portion of the non-volatile memory cell array.

Semiconductor device having resistance based memory array and method of operation associated therewith

A resistance-variable memory device includes memory cells, a high voltage circuit, a precharging circuit, a bias circuit, and a sense amplifier. Each memory cell may, for example, include a resistance-variable material and a diode connected to a bitline. The high voltage circuit provides a high voltage from a power source. The precharging circuit raises the bitline up to the high voltage after charging the bitline up to the power source voltage. The bias circuit supplies a read current to the bitline using the high voltage. The sense amplifier compares a voltage of the bitline with a reference voltage by means of the high voltage.

Resistance variable memory devices and read methods thereof

A method of programming a resistance variable memory cell to a given logic state includes applying a first programming current to the memory cell, executing a verify read of the memory cell by sensing a logic state of the memory cell, and applying a second programming current to the memory cell when the sensed logic state is different than the given logic state, where the second programming current is greater than the first programming current.

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Hwaseong-si, South Korea

Kwangjin Lee