Samsung Electronics Co., Ltd.

Kwang-Seop Kim

Jae-jun Lee

Ki-Hyun Ko

Do-Hyung Kim

Bo-Ra Kim

Young Nam Yun

Jeong-Hoon Baek

Da-Ae Heo

Yong-jin Kim

Dong-Woo Shin

Kwang-Soo Park

Byung-Se So

Do-hyung Kim

Yong-Jin Kim

Jung-Joon Lee

Dong-chun Lee

Yong-Hyun Kim

Soo-Kyung Kim

Sung-joo Park

Chang-Yong Park

Jeong-Hyeon Cho

Byung-Man Kim

Kwang-Ho Chun

Chil-Nam Yoon

A memory module includes a command/address (CA) register, memory devices, and a module resistor unit mounted on a circuit board. The centrally disposed CA register drive the memory devices one or more internal CA signal(s) to arrangements of memory devices using multiple CA transmission lines, wherein the multiple internal CA transmission lines are commonly terminated in the module resistor unit.

Memory modules including plural memory devices arranged in rows and module resistor units

The invention provides a thermal-emitting memory module, a thermal-emitting module socket, and a computer system comprising the thermal-emitting memory module and the thermal-emitting module socket. An embodiment of the thermal-emitting module includes: a module substrate having electrically-conductive traces; and a semiconductor device disposed on the module substrate and coupled to the electrically-conductive traces, the module substrate including a thermal-emitting portion disposed in proximity of the semiconductor device without directly contacting the semiconductor device.

Thermal-emitting memory module, thermal-emitting module socket, and computer system

Pairs of registers with reduced pins are disposed to overlap on front and back surfaces of a memory module. An input signal INS is transferred through the registers in series in a daisy chain fashion to avoid divergence of the input signal INS for preserved signal integrity. Each register buffers the input signal INS to memory banks disposed closely to sides of the register for reduced wiring area.

Memory module with registers

The pesent invention discloses a memory module and a signal line arrangement method thereof. The memory module includes memory chips mounted on both sidees in a mirror form; and a printed circuit board (PCB) having same signal applying contact pads arranged on both sodes which same signal applying balls of the memory chips contact in the mirror form, wherein a via is formed at a location close to the same signal applying contact pad of one side among the same signal applying contact pads arranged on both sides in the mirror form, the via connecting the other side to the signal line of one side, and a signal transmitted from the other side is connected to a contact junction, the contact junction is connected to the same signal applying contact pad of the other side, the contact junction is connected to the via of the other side, and the via of one side is connected to the same signal applying contact pad of one side.

Memory module and signal line arrangement method thereof

In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.

Semiconductor module and method of forming a semiconductor module

A memory module preferably includes a printed circuit board (PCB) panel having multiple memory chip pad groups arranged on both sides thereof. Each memory chip pad group preferably includes multiple pads that correspond to lead lines of multiple memory chips arranged on the PCB panel. Connectors are preferably formed along an edge of the PCB panel to electrically connect the memory chip pad groups to an external device. Multiple damping chip pad groups preferably include built-in damping chips. One or more of the damping chip pad groups are preferably arranged adjacent to a lateral edge of one or more of the memory chips. The damping chip pad groups can electrically connect the connectors to the memory chip pad groups and dampen the signal noises.

Memory module

Growing community of inventors

Yongin-si, South Korea

Kwang-Seop Kim