Hynix Semiconductor Inc.

Skhynix Inc.

Yonsei University

Samsung Electronics Co., Ltd.

Kwang-Seok Kim

Seong-Ook Jung

Taek-Sang Song

Chul-Hyun Park

Hyuck-Sang Yim

Seung-Han Woo

Dong-Hoon Jung

Kyung-Ho Ryu

A temperature sensing circuit includes a signal generation unit including a delay line and generating a source signal with a pulse width corresponding to a delay value of the delay line, a pulse width expansion unit configured to generate a comparison signal by expanding a pulse width of the source signal, and a change detection unit configured to sense a temperature change using a difference between the pulse widths of the comparison signal and a reference signal.

Temperature sensing circuit

A data sensing circuit includes: a current source configured to supply a reference current to an output line; a switching precharging unit configured to couple an input line with the output line during a precharge operation of the input line; and a current sinking unit configured to sink a current from the output line in response to a voltage level of the input line.

Data sensing circuit and memory device including the same

A non-volatile memory device includes a memory cell including a resistance variable device and a switching unit for controlling a current flowing through the resistance variable device; a read reference voltage generator configured to generate a reference voltage according to a skew occurring in the switching unit; and a sense amplifier configured to sense a voltage corresponding to the current that flows through the resistance variable device based on the reference voltage.

Non-volatile memory device

A semiconductor memory apparatus according to an embodiment of the present invention includes a plurality of cell mats each having a plurality of cells, a plurality of sense amplifier arrays, each having a plurality of sense amplifiers for sensing the cells in response to a power terminal driving signal and a ground terminal driving signal, and a sense amplifier activation control unit that adjusts a timing, at which the sense amplifier arrays are activated, in response to a refresh signal.

Semiconductor memory apparatus having plurality of sense amplifier arrays having different activation timing

Growing community of inventors

Gyeonggi-do, South Korea

Kwang-Seok Kim