United Microelectronics Corp.

United Integrated Circuits Corp.

Kwang-Ming Lin

Chieh-Te Chen

Pang-Miao Liu

Tzu-Min Peng

Russell Chen

A method of fabricating a node contact opening is described. A dielectric layer is formed on a substrate. A first conductive layer is formed on the dielectric layer. The first conductive layer is etched to form a trapezoidally cross-sectioned opening exposing a portion of the dielectric layer. The dielectric layer exposed by the trapezoidally cross-sectioned opening is etched to form a node contact opening in the dielectric layer exposing a part the substrate. A second conductive layer is formed to fill the node contact opening and in contact with the conductive layer.

Method of fabricating a node contact

A method for forming a SAC opening is provided. As a self-aligned contact (SAC) opening is formed in a dielectric layer on a semiconductor substrate to expose one of source/drain regions in the substrate, a misalignment of the SAC opening may occur to expose a portion of the gate structure. The gate structure has a gate, which is covered by a cap layer on the top, a thin oxide layer on each sidewall of the gate and the cap layer, and a spacer on the thin oxide layer. The SAC opening causes a clearance between the spacer and the gate since a portion of the thin oxide layer is removed. The method contains forming an insulating layer over the substrate to fill the clearance. An etching back process is performed to remove the insulating layer so that a remaining portion of the insulating layer fills the clearance to fully isolate the gate.

Growing community of inventors

Hsinchu, Taiwan

Kwang-Ming Lin