Intel Corporation

Apple Inc.

Freescale Semiconductor,inc.

Fujitsu Semiconductor Limited

Kurt Hausmann

Chuanzhao Yu

Omid Oliaei

Mark Alan Kirschenmann

Hyun Yoon

Lillian G Lent

Stephen Rector

A buffer circuit includes a first feedback buffer to receive a first component of a current-mode signal and a second feedback buffer to receive a second component of the current-mode signal. The buffer circuit also including a first inverter having a first input coupled to an output of the second feedback buffer and to an input of a first current circuit through a first filter, a first output coupled to an input of the first feedback buffer. The buffer circuit also includes a second inverter having a second input coupled to an output of the first feedback buffer and to an input of a second current circuit through a second filter, and a second output coupled to an input of the second feedback buffer.

Transceiver baseband processing

Wideband signal buffers that can be employed for mmWave (millimeter wave) communication are disclosed. One example signal buffer comprises a variable gain amplifier (VGA) that receives two control words and outputs a feedback signal, wherein both an amplitude and a phase of the feedback signal are based on the two control words and on a bias voltage; and a matching network comprising a first inductor that outputs the bias voltage, a second inductor, and a third inductor that receives the feedback signal from the VGA, and wherein the first, second, and third inductors are magnetically coupled to each other, wherein the signal buffer is configured to receive a RF (Radio Frequency) input and to generate a RF output from the RF input based on a transfer function of the signal buffer, wherein the transfer function is based at least in part on the feedback signal.

Wideband signal buffer

In accordance with some embodiments of the present disclosure an attenuating circuit comprises a balun configured to receive a radio frequency (RF) signal at first and second input ports and configured to output the RF signal. The circuit further comprises an attenuator coupled in parallel with the first and second input ports. A power level of the RF signal output by the balun is based at least partially on an impedance of the attenuator. The attenuator comprises a resistor ladder configured to receive at least a portion of the RF signal and a plurality of switches coupled to the resistor ladder. The plurality of switches are configured to open and close such that the impedance of the attenuator is a function of which switches are open and closed. Therefore, the power of the RF signal is controlled based at least on the opening and closing of the switches.

Digital voltage-controlled attenuator

An integrated transmit circuit includes a voltage controlled oscillator () for generating an input frequency signal (e.g., VCO) that is provided to a divide by two quadrature generator circuit () which generates therefrom in-phase and quadrature clocking signals (I, IB, Q, QB) that are applied to control a plurality of transmission gates (-) configured in a matched switching topology () so as to selectively pass pulses from the input frequency signal, thereby generating interleaved LO pulses (&#xd8;, &#xd8;, . . . &#xd8;, &#xd8;). By applying the interleaved LO pulses to control the transmission gates (, and) in the upmixer (), the +I, &#x2212;I, +Q, &#x2212;Q input signals are interleaved over a plurality of phases of a carrier period to produce differential outputs ().

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Chandler, AZ, United States of America

Kurt Hausmann