Micron Technology Incorporated

Micron Semiconductor, Inc.

Kurt D Beigel

Douglas John Cutter

Fan Ho

Eric T Stubbs

Gordon D Roberts

Jeffrey D Bruce

Scott E Sills

Manny K Ma

James E Miller, Jr

Daryl L Habersetzer

Patrick J Mullarkey

Kim M Pierce

Brett M Debenham

Dien S Luong

Adrian E Ong

R Jacob Baker

Fred D Fishburn

Hongmei Wang

Rongsheng Yang

Kevin G Duesman

Jigish D Trivedi

Todd A Merritt

Jeffrey P Wright

Michael Amiel Shore

Hua Zheng

Sanh D Tang

A semiconductor device comprises a stack structure comprising decks each comprising a memory element level comprising memory elements, and a control logic level in electrical communication with the memory element level and comprising control logic devices. At least one of the control logic devices of the control logic level of one or more of the decks comprises at least one device exhibiting a gate electrode shared by neighboring vertical transistors thereof. A control logic assembly, a control logic device, an electronic system, a method of forming a control logic device, and a method of operating a semiconductor device are also described.

Control logic assemblies

A semiconductor device includes a stack structure comprising decks. Each deck of the stack structure comprises a memory element level comprising memory elements and control logic level in electrical communication with the memory element level, the control logic level comprising a first subdeck structure comprising a first number of transistors comprising a P-type channel region or an N-type channel region and a second subdeck structure comprising a second number of transistors comprising the other of the P-type channel region or the N-type channel region overlying the first subdeck structure. Related semiconductor devices and methods of forming the semiconductor devices are disclosed.

Devices including control logic structures, and related methods

Some embodiments include an assembly having a CMOS tier. The CMOS tier includes a PMOS deck and an NMOS deck, with the decks being vertically offset relative to one another. The PMOS deck has p-channel transistors which are substantially identical to one another, and the NMOS deck has n-channel transistors which are substantially identical to one another. An insulative region is between the PMOS deck and the NMOS deck. The CMOS tier has one or more circuit components which include one or more of the n-channel transistors coupled with one or more of the p-channel transistors through one or more conductive interconnects extending through the insulative region. Some embodiments include methods of forming assemblies to comprise one or more CMOS tiers.

Assemblies containing PMOS decks vertically-integrated with NMOS decks, and methods of forming integrated assemblies

A semiconductor device comprises a stack structure comprising decks each comprising a memory element level comprising memory elements, and a control logic level in electrical communication with the memory element level and comprising control logic devices. At least one of the control logic devices of the control logic level of one or more of the decks comprises at least one device exhibiting transistors laterally displaced from one another. A memory device, a thin film transistor control logic assembly, an electronic system, and a method of operating a semiconductor device are also described.

Devices, memory devices, and methods of forming devices

A semiconductor device comprises a stack structure comprising decks each comprising a memory level comprising memory elements, a control logic level vertically adjacent and in electrical communication with the memory level and comprising control logic devices configured to effectuate a portion of control operations for the memory level, and an additional control logic level vertically adjacent and in electrical communication with the memory level and comprising additional control logic devices configured to effectuate an additional portion of the control operations for the memory level. A memory device, a method of operating a semiconductor device, and an electronic system are also described.

Memory devices

Control logic assemblies and methods of forming a control logic device

Devices, memory devices, and electronic systems

Devices including control logic structures, electronic systems, and related methods

Semiconductor devices, and related control logic assemblies, electronic systems, and methods

Apparatuses and memory devices including control logic levels, and related electronic systems

Semiconductor devices, and related memory devices and electronic systems

Methods of forming integrated assemblies

Growing community of inventors

Boise, ID, United States of America

Kurt D Beigel