Silicon Graphics, Incorporated

Nvidia Corporation

Kurt Barton Akeley

James L Foran

Mark J Kilgard

Carroll Philip Gossett

Mark Stefan Grossman

Robert A Drebin

William R Mark

Robert Steven Glanville

Carl Phillip Korobkin

A system and method for interfacing graphics program modules written to execute on a plurality of functional units of a graphics processor using a shared memory. A central processing unit (CPU) receives a first graphics program module that outputs a first parameter referenced by a first graphics program module identifier, a second graphics program module that inputs the first parameter by referencing the first graphics program module identifier, and a first data structure that includes, in a pre-defined order, a list of first data structure identifiers. The CPU identifies a memory location in the shared memory, based on the pre-defined order of the first data structure identifiers, for one of the first data structure identifiers that is the same as the first graphics program module identifier. The CPU modifies the first and second graphics program modules to reference the first parameter by the identified memory location in the shared memory.

System and method for interfacing graphics program modules

A method and apparatus for multisample dithering is provided. For the method of the present invention, a graphics pipeline generates a series of b-bit color sample values for each pixel that is to be processed. Each color sample is defined to include one or more omitted values. The omitted values allow the color sample values to have a range that exceeds the range that would normally be associated with the b-bits of each color sample value. The extended range of the color sample values allows the color sample values to be summed to exactly reconstruct all color values. At the same time, the values in the color samples are close to exact values. This means that constructed color values are close to their correct values.

Multisample dither method with exact reconstruction

A computer-implemented method for generating three dimensional line drawings in which only silhouette edges and true edges that are visible are displayed. The color, depth, and stencil buffers are respectively initialized to background color, farthest value, and zero. In a first pass, all polygons are rendered by filling all pixels within their boundaries. At each pixel, only its depth value is modified by selecting the nearer of either the current depth value or the new depth value. This creates a depth image in the depth buffer used for occlusion detection. In a second pass, all the polygons of a particular orientation are rendered by drawing lines from vertex to vertex for each of the polygons. The pixel values are modified only when the depth comparison passes (i.e., the pixel is visible and not occluded). Each time a particular pixel is modified, its corresponding stencil value is toggled from 0 to 1 or from 1 back to 0. Afterwards, the value of each pixel in the frame buffer is set to the line color if and only if its corresponding stencil value is 1. Lastly, all true edges are rendered. For the true edges, only those pixels which pass the depth comparison are modified by setting them to the line color. In the end, only the visible true edges and silhouette edges are drawn for display.

Method for rendering silhouette and true edges of 3-D line drawings with occlusion

A system and method for managing multiple frame buffers. The system includes multiple frame buffers, and thus reduces the risk of dropped frames. The system controls and bounds render-to-display latency, and provides an application friendly and effective interface to the frame buffers. The system operates by estimating a latency of a frame that is yet to be rendered. The system determines whether the latency is greater than a target latency. If the latency is greater than the target latency, then the system blocks the application that is responsible for rendering the frame before rendering of the frame commences. As a result, render-to-display latency is bounded to the target latency. The system addresses the naming issue by providing the application with access to only the front buffer and the back buffer. In particular, the present system maintains a queue of one or more frame buffers. The newest frame buffer appended to the queue is considered to be the front buffer. The oldest frame buffer in the queue is displayed. A frame buffer not in the queue is considered to be the back buffer. Rendering is enabled to the back buffer. Once rendering to the back buffer is complete, the back buffer is appended to the queue and becomes the new front buffer.

System and method for buffering multiple frames while controlling latency

A system and method for merging received pixel fragments with an existing fragment compares a depth range for the received fragment with a depth range for the existing fragment. If there is a range overlap, the new fragment is merged with the existing fragment for which there is overlap. If there is no range overlap, the new fragment is discarded. The merge operation can be performed for fragments received for a single surface, such as the nearest surface. Alternatively, the merge operation can be performed for fragments received for a plurality of surfaces.

System and method for merging pixel fragments based on depth range values

In a computer system for creating images of three-dimensional objects, an apparatus and method for processing depth values representing the relative depths of the objects. The depth values are transformed according to projections in order to give the appearance of depth when the objects are displayed on a two-dimensional computer screen. These transformed depth values are then interpolated using N bits of precision. Next, the depth values are encoded into a format whereby the depth values have less than N bits. These encoded depth values are stored into memory. In displaying the objects, the encoded depth values are read from memory and compared to determine the relative depths of the objects.

Apparatus and method for selectively storing depth information of a 3-D

A method and apparatus for controlling the storage of display information into a frame buffer is disclosed. A memory means is provided for storing information for controlling the storage of display information into the frame buffer where the memory means contains a plurality of locations each of which corresponds to and controls the storing of display information in one location of the frame buffer. A pass/fail ALU is coupled to the memory means to obtain a value for a particular pixel; this ALU provides a signal indicative of one of a first or second state which state indicates whether storage of display information to the frame buffer will occur. A first function is stored in a register, which function specifies the first signal. A first storage register and a second storage register store a second function and a third function respectively and provide a second value and a third respectively. The second value or third value is stored as a new value in the first memory for said first pixel location depending upon the state indicated by tile first signal. An application of the method and device of the invention includes a method for generating hollow polygons having an interior region and a perimeter in said frame buffer for display on said display device.

Apparatus and method for controlling storage of display information in a

In a computer graphics system, a method of generating a geometrically valid point sample mask corresponding to a pixel. A separate mask is generated for each edge of a polygon. These masks specify whether particular subsample points are within a half-plane defined by an edge of the polygon. This information is determined by examining the sign of vertical or horizontal distance metrics corresponding to those sample points. These separate masks are merged to form the final point sample mask. Thereby, the final point sample mask contains information specifying whether particular sample points reside within the polygon. This information is used in rendering the pixel for display by the computer graphics system.

Apparatus and method for generating point sample masks in a graphics

A method for determining the coverage of a pixel, which includes determining a function of the distance from the currently sampled point to each edge of a polygon and then adding a predetermined value to the value of the function. This value is then clamped according to a function which provides an output of a predetermined value if the input to the function is not within a predetermined range and otherwise provides the value of the input if the input is within the predetermined range. The coverage of the pixel by the polygon is computed by multiplying the clamped functions. Blending the parameter values is performed if the value of the coverage falls within a predetermined range; otherwise, no blending occurs.

Method for display rendering by determining the coverage of pixels in

A method for scan converting a triangular polygon where information representative of parameter values at each vertex is provided. The method includes the step of selecting an edge of the triangular polygon which is designated as a major edge and calculating parameter values for a first pixel center adjacent to the major edge, and then moving to a next pixel center adjacent to the major edge and calculating parameter values for that next pixel center adjacent to the major edge. The method continues to find pixel centers adjacent to the major edge until all parameter values for pixel centers adjacent to the major edge have been calculated. Then, for each line parallel to an orthogonal axis of the display device which is intersected by the triangular polygon, the method interpolates parameter values for pixel centers within the triangle which have not been calculated by interpolating from the calculated parameter values for one pixel center for each line. Typically, a line is column or a scan line.

Method for scan converting shaded triangular polygons

A method and apparatus for controlling the storage of display information into a frame buffer is disclosed. A memory means is provided for storing information for controlling the storage of display information into the frame buffer where the memory means contains a plurality of locations each of which corresponds to and controls the storing of display information in one location of the frame buffer. A pass/fail ALU is coupled to the memory means to obtain a value for a particular pixel; this ALU provides a signal indicative of one of a first or second state which state indicates whether storage of display information to the frame buffer will occur. A first function is stored in a register, which function specifies the first signal. A first storage register and a second storage register store a second function and a third function respectively and provide a second value and a third respectively. The second value or third value is stored as a new value in the first memory for said first pixel location depending upon the state indicated by the first signal. An application of the method and device of the invention includes a method for generating hollow polygons having an interior region and a perimeter in said frame buffer for display on said display device.

A graphical display system and process for specifying and controlling a display range in which a specified form of texture mapping is applied or suppressed. Object data from a host computer is processed by four pipelined graphics subsystems before being displayed on a display screen. These graphics subsystems include: 1) a Geometry Subsystem, 2) a Scan Conversion Subsystem, 3) a Raster Subsystem, and 4) a Display Subsystem. Span Processors within the Scan Conversion Subsystem manipulate pixel coordinates in order to handle sitations when coordinates are located out of range of a texture map. Processing logic and hardware registers located within each Span Processor implement two texture modes for handling out-of-range coordinates. First, a mask and comparison register is provided to hold a value specifying a selected range in which texture is applied to a pixel. If a pixel is outside the specified range, texture application is suppressed. Secondly, logic is provided for determining if the input pixel coordinate is within range of the texture map. If the input coordinate is out of range and positive, the coordinate is set to a value corresponding to the most positive border of the texture map. If the input coordinate is out of range and negative, the coordinate is set to a value corresponding to the least positive border of the texture map. The processed coordinate is then output to one of a plurality of Image Engines.

Texture range controls for improved texture mapping

A method and apparatus for producing a visually improved image on a video display in a computer controlled display system. The system and method converts a quadrilateral polygon to a pair of triangles by computing the dot product of the normal unit vectors of one set of opposing pair of vectices and computing the dot product of the normal unit vectors of the other set of opposing pair of vertices and then comparing these two dot products to determine which opposing pair of vertices produces the larger of the two dot products. The pair of opposing vertices which produces the largest dot product is used to form the common edge of the pair of triangles into which the quadrilateral is converted.

Method and apparatus for producing a visually improved image in a

A system for displaying graphic images comprising an arrangement for clipping polygons against preselected clipping planes, an arrangement for determining when the vertices of a polygon all lie within one of a number of particular subspaces defined by the clipping planes, and an arrangement for disabling the means for clipping so long as all vertices of a polygon lie in the same subspace.

Growing community of inventors

Mountain View, CA, United States of America

Kurt Barton Akeley