Macronix International Co., Ltd.

Kuo Yu Liao

Su-Chueh Lo

Chun Hsiung Hung

Ken Hui Chen

Yi-Fan Chang

Ta Kang Chu

Chu Ching Wu

Chun-Hsiung Hung

Kuen-Long Chang

Ray L Wan

Kuen Long Chang

Han Sung Chen

Cheng Ming Yih

Cheng-Ming Yi

Various discussed approaches improve the over erase issue and the coupling effect, and include (A) multilevel contacts between (i) the first outer selected word line of an erase group, and (ii) the first unselected word line outside the ease group neighboring the first outer selected word line; (B) a sufficient separation distance between (i) the first outer selected word line of an erase group, and (ii) the first unselected word line outside the ease group neighboring the first outer selected word line. These are examples of electrically isolating (i) the first outer selected word line of an erase group, from (ii) the first unselected word line outside the ease group neighboring the first outer selected word line.

Method and apparatus of performing an erase operation on a memory integrated circuit

A non-volatile integrated circuit memory, such as a flash memory device based on floating gate transistor memory cells, with read while write capability is provided using a single address register. The integrated circuit includes at least two independent arrays of memory cells. During a program or an erase operation in one array on the non-volatile integrated circuit, a read operation can be executed in the other array on the same integrated circuit by bypassing the address register altogether, and allowing the register to remain in use by the program or erase operation. A bypass combinatorial logic path for the read process is coupled to the same address inputs as the address register, and operable in parallel with the registered address path.

Non-volatile integrated circuit having read while write capability using one address register

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Jhubei, Taiwan

Kuo Yu Liao