Auo Corporation

Kuo-Wei Ho

Ya-Ling Hsu

Yueh-Hung Chung

Sheng-Yen Cheng

A pixel array substrate includes a substrate, a gate driver circuit, a first conductive pattern, a first dielectric layer, a second conductive pattern, a second dielectric layer, and a third conductive pattern. The first conductive pattern includes a first branch clock signal line which is electrically connected to the gate driver circuit. The first conductive pattern is located between the substrate and the first dielectric layer. The second conductive pattern is located between the first dielectric layer and the second dielectric layer and includes a shielding structure. The third conductive pattern is located on the second dielectric layer and includes a first clock signal line and a data line. The first branch clock signal line electrically connects the first clock signal line to the gate driver circuit and intersects the data line. The shielding structure is located between the data line and the first branch clock signal line.

Growing community of inventors

Hsinchu, Taiwan

Kuo-Wei Ho