Taiwan Semiconductor Manufacturing Comp. Ltd.

Kuo-Wei Chu

Wen-Ting Chu

Yong-Shiuan Tsair

Cheng-Hsiung Kuo

Ching-Sen Kuo

Shih-Wei Wang

Hsiang-Fan Lee

Chia-Tong Ho

Jih-Chen Wang

Yi-Jiun Lin

A charge pump circuit is provided which includes at least two charge pump stages connected in series with a front charge pump stage having a first transistor for receiving an input voltage and a last charge pump stage having a second transistor for providing an output voltage. The first transistor is configured to operate at a first threshold voltage and the second transistor is configured to operate at a second threshold voltage different than the first threshold voltage.

Apparatus and method for increasing charge pump efficiency

A method for forming triple polysilicon split gate electrodes in a EEPROM flash memory array providing a first gate structure; blanket depositing a first polysilicon layer over the first gate structure; etching back the first polysilicon layer according to a first dry etching process; blanket depositing a second dielectric insulating layer over the first polysilicon layer; blanket depositing a second polysilicon layer over the second dielectric insulating layer; and, lithographically patterning and dry etching according to a respective third and fourth dry etching process through a thickness portion of the respective second and first polysilicon layers to respectively form third and second polysilicon gate electrodes.

Poly-etching method for split gate flash memory cell

Growing community of inventors

Taipei, Taiwan

Kuo-Wei Chu