Au Optronics Corporation

Kuo-Ting Yang

Yuan-Nan Chiu

Yu-Lin Huang

Er-Lang Deng

I-Sheng Lin

Chih-Yuan Wu

A gate driving circuit comprises a plurality of shift registers coupled in serial. An nth shift register includes a driving circuit, a pull-up circuit and a first auxiliary voltage regulator circuit. The driving circuit is electrically coupled to an output node and a first node. The driving circuit is configured to receive a clock signal and output a gate signal according to the clock signal. The pull-up circuit is electrically coupled to the driving circuit. The first auxiliary voltage regulator circuit is electrically coupled to the pull-up circuit and a second node. The first auxiliary voltage regulator circuit is configured to receive a control signal and the second node corresponding to a second voltage.

Growing community of inventors

Hsin-Chu, Taiwan

Kuo-Ting Yang