Taiwan Semiconductor Manufacturing Comp. Ltd.

Kuo-Liang Sung

Ziwei Fang

Huang-Lin Chao

Hsueh Wen Tsau

Cheng-Hui Weng

A semiconductor structure includes an interfacial layer disposed over a semiconductor channel region, a metal oxide layer disposed over the interfacial layer, a high-k gate dielectric layer disposed over the metal oxide layer, a metal halide layer disposed over the high-k gate dielectric layer, and a metal gate electrode disposed over the high-k gate dielectric layer. The metal oxide layer and the interfacial layer form a dipole moment. The metal oxide layer includes a first metal. The metal halide layer includes a second metal different from the first metal.

Tuning threshold voltage in field-effect transistors

A semiconductor structure includes an interfacial layer disposed over a semiconductor layer, a high-k gate dielectric layer disposed over the interfacial layer, where the high-k gate dielectric layer includes a first metal, a metal oxide layer disposed between the high-k gate dielectric layer and the interfacial layer, where the metal oxide layer is configured to form a dipole moment with the interfacial layer, and a metal gate stack disposed over the high-k gate dielectric layer. The metal oxide layer includes a second metal different from the first metal, and a concentration of the second metal decreases from a top surface of the high-k gate dielectric layer to the interface between the high-k gate dielectric layer and the interfacial layer.

A method includes removing a dummy gate structure to form a gate trench over a semiconductor layer, forming a high-k gate dielectric layer over an interfacial layer exposed in the gate trench, depositing a metal-containing precursor over the high-k gate dielectric layer to form a metal-containing layer, and subsequently depositing an aluminum-containing precursor over the metal-containing layer, where depositing the aluminum-containing precursor forms an aluminum oxide layer at an interface between the high-k gate dielectric layer and the interfacial layer and where the metal-containing precursor includes a metal different from aluminum. The method further includes, subsequent to depositing the aluminum-containing precursor, removing a portion of the metal-containing layer, depositing a work-function metal layer over a remaining portion of the metal-containing layer, and forming a bulk conductive layer over the work-function metal layer, resulting in a metal gate structure.

A monitor wafer for use in monitoring a preclean process and method of making same are described. One embodiment is a monitor wafer comprising a silicon base layer; a capping layer disposed on the silicon base layer; and a barrier layer disposed on the USG layer. The monitor wafer further comprises a copper ('Cu') seed layer disposed on the barrier layer; and a thick Cu layer disposed on the Cu seed layer.

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Miaoli County, Taiwan

Kuo-Liang Sung