Taiwan Semiconductor Manufacturing Comp. Ltd.

Kuo-Hsiu Wei

Kei-Wei Chen

Ying-Lang Wang

Tang-Kuei Chang

Li-Chieh Wu

Chia Hsuan Lee

Chun-Ting Kuo

Huicheng Chang

Liang-Yin Chen

Su-Hao Liu

Kuo-Ju Chen

Ting-Kui Chang

Jian-Ci Lin

Chun-Wei Hsu

Huai-Tei Yang

Liang-Guang Chen

Ting-Chun Wang

Yi-Sheng Lin

Chi-Jen Liu

Chi-Hsiang Shen

Chia-Wei Ho

Shih-Tzung Chang

Yang-Chun Cheng

Yuan-Hsuan Chen

Yi-Wei Chiu

Yu-Ku Lin

Ching-Chung Su

Pin Chia Su

Wei-Jen Lo

Chih-Cherng Jeng

Mu-Han Cheng

Yih Song Chiu

Ming-Wen Chen

Yu-Kin Lin

Tzu Chan Weng

The present disclosure provides methods for forming conductive features in a dielectric layer without using adhesion layers or barrier layers and devices formed thereby. In some embodiments, a structure comprising a dielectric layer over a substrate, and a conductive feature disposed through the dielectric layer. The dielectric layer has a lower surface near the substrate and a top surface distal from the substrate. The conductive feature is in direct contact with the dielectric layer, and the dielectric layer comprises an implant species. A concentration of the implant species in the dielectric layer has a peak concentration proximate the top surface of the dielectric layer, and the concentration of the implant species decreases from the peak concentration in a direction towards the lower surface of the dielectric layer.

Metal loss prevention using implantation

An apparatus includes a first metrology tool configured to measure an initial thickness of a wafer. The apparatus includes a controller connected to the first metrology tool and configured to calculate a polishing time based on a material removal rate, a predetermined thickness and the initial thickness of the wafer. The apparatus includes a polishing tool connected to the controller and configured to polish the wafer for a first duration equal to the polishing time. The apparatus includes a second metrology tool connected to the controller and configured to measure a polished thickness. The controller is configured for receiving the initial thickness from the first metrology tool and the polished thickness from the second metrology tool, updating the material removal rate based on the predetermined thickness, the polishing time and the polished thickness, and calculating an etching time for etching the polished wafer using the polished thickness.

Wafer thinning apparatus having feedback control

A structure and a formation method of a semiconductor device are provided. The method includes forming a conductive feature over a semiconductor substrate and forming a dielectric layer over the conductive feature. The method also includes forming an opening in the dielectric layer to expose the conductive feature. The method further includes forming a conductive material to overfill the opening. In addition, the method includes thinning the conductive material using a chemical mechanical polishing process. A slurry used in the chemical mechanical polishing process includes an iron-containing oxidizer that oxidizes a portion of the conductive material.

Structure and formation method of semiconductor device with conductive feature

Methods of forming a slurry and methods of performing a chemical mechanical polishing (CMP) process utilized in manufacturing semiconductor devices, as described herein, may be performed on semiconductor devices including integrated contact structures with ruthenium (Ru) plug contacts down to a semiconductor substrate. The slurry may be formed by mixing a first abrasive, a second abrasive, and a reactant with a solvent. The first abrasive may include a first particulate including titanium dioxide (TiO) particles and the second abrasive may include a second particulate that is different from the first particulate. The slurry may be used in a CMP process for removing ruthenium (Ru) materials and dielectric materials from a surface of a workpiece resulting in better WiD loading and planarization of the surface for a flat profile.

Methods of forming an abrasive slurry and methods for chemical- mechanical polishing

Methods of forming an abrasive slurry and methods for chemical-mechanical polishing

A wafer thinning apparatus includes a first metrology tool configured to measure an initial thickness of the wafer. The wafer thinning apparatus further includes a controller connected to the first metrology tool, and configured to determine a polishing time based on the initial thickness, a predetermined thickness and a material removal rate. The wafer thinning apparatus further includes a polishing tool connected to the controller configured to polish the wafer for a period of time equal to the polishing time. The wafer thinning apparatus includes a second metrology tool connected to the controller and the polishing tool, and configured to measure a polished thickness. The controller is configured to update the material removal rate based on the polished thickness, the predetermined thickness and the polishing time.

Wafer thinning apparatus having feedback control and method of using

A wafer edge trimming tool includes an abrasive tape and a holding module configured to hold the abrasive tape against portions of an edge of a rotating wafer during a wafer edge trimming process.

Wafer edge trimming tool using abrasive tape

Methods for processing a substrate having a structure formed thereon and a system for processing a substrate are provided. A substrate is received from first processing equipment, where the first processing equipment has formed the structure on the substrate. A lithography process is performed on the received substrate. The lithography process includes exposing the substrate under an optical condition. The lithography process further includes polishing a backside of the substrate prior to the exposing of the substrate, where the polishing is configured to remove a topographical feature of the backside of the substrate or to remove a contaminant from the backside of the substrate. The substrate does not undergo a cleaning procedure during a period of time between i) the forming of the structure on the substrate, and ii) the exposing of the substrate.

Lithography tool with backside polisher

Semiconductor devices and back side illumination (BSI) sensor manufacturing methods are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece and forming an integrated circuit on a front side of the workpiece. A grid of a conductive material is formed on a back side of the workpiece using a damascene process.

Image sensor manufacturing methods

A wafer edge trim blade includes a round blade body and at least one slot formed inward from an outside edge of the round blade body. The at least one slot is configured to remove debris generated during wafer edge trimming using the wafer edge trim blade.

Wafer edge trim blade with slots

A method of grinding a wafer includes positioning a wafer beneath a grinding wheel and aligning the wafer and the grinding wheel. The method further includes contacting a grinding surface of an outer base of the grinding wheel with the wafer while rotating at least one of the wafer and the grinding wheel, contacting a grinding surface of an inner frame of the grinding wheel with the wafer while rotating at least one of the wafer and the grinding wheel, without changing the alignment between the wafer and the grinding wheel, and tilting one of the wafer and the grinding wheel relative to the other during at least one of the first and the second contacting steps. The method also includes removing the wafer from the position beneath the grinding wheel.

Method for wafer grinding

Growing community of inventors

Tainan, Taiwan

Kuo-Hsiu Wei