Realtek Semiconductor Inc.

Via Technologies, Inc.

Kuo-Hsin Chen

Jyh-Fong Lin

Hsin-Chieh Lin

Tai-Haur Kuo

A sigma-delta modulator includes an adder, a filter, a quantizer, and a clock rate controller. The adder receives an input signal and an output signal to generate a summation signal. The filter is coupled to the adder and filters the summation signal to generate a filtered signal. The quantizer is coupled to the filter as well as the adder and quantizes the filtered signal to generate the output signal according to a first clock signal. The clock rate controller is coupled to the quantizer and generates the first clock signal, wherein a frequency of the first clock signal is variable.

Sigma-delta modulator and method thereof

An amplifier includes a sigma-delta modulating circuit, a power stage circuit, two feedback components, an error suppressing circuit, and a selecting circuit. The sigma-delta modulating circuit generates two input voltages according to two input signals or one single-ended signal. The power stage circuit provides two output voltages according to the two input voltages or an error adjusting voltage. The two feedback components are respectively coupled to two output terminals of the power stage circuit and two input terminals of the sigma-delta modulating circuits. The error suppressing circuit is used for providing the error adjusting voltage according to the two input voltages. The selecting circuit selects outputs depending on whether the two input voltages corresponding to different logic levels or an identical logic level for adjusting the power stage circuit to suppress a mismatch error between the two feedback components.

Amplifier using sigma-delta modulation and method for adjusting errors of the amplifier thereof

An analog-to-digital data converter converts an input signal to corresponding digital signals. The data converter includes two sets of comparison units arranged in an interlaced sense to alternatively analyze the input signal, generate digital signals corresponding to the result of comparing the input signal and reference signals. Each of the comparison units has a positive output and a negative output, and the digital signal is generated by the negative output and the positive output of the comparison units in a differential way. When the comparison units of one set are performing auto-zeroing, the comparison units of the other set perform the data conversion to generate corresponding digital signals.

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Taipei, Taiwan

Kuo-Hsin Chen