Sanyo Electric Co., Ltd.

Semiconductor Technology Academic Research Center

Kuniyuki Tani

Atsushi Wada

Shigeto Kobayashi

Takeshi Otsuka

Shoji Kawahito

Yasuhide Shimizu

Koji Sushihara

Akira Kurauchi

Koichiro Mashiko

Hajime Takashima

Kazutaka Honda

Tohru Watanabe

Tatsushi Ohyama

Yoh Takano

Noriaki Kojima

Norihiro Nikai

Keisuke Watanabe

Takafumi Nakamori

Yasuyuki Kimura

Keishi Kato

Zheng Liu

Kenichi Kato

When successively reading out pixel information from an image region, where image pickup devices are arranged two-dimensionally, which is divided into a plurality of sub-regions, a readout unit inserts pixel information on pixels of interest in the respective sub-regions successively at predetermined intervals and reads them out. A control unit generates a frame from the pixel information, on pixels of interest inserted at the predetermined intervals, which has been read out from the readout unit. The control unit grasps a tendency of a picked-up image from the generated frame and performs a predetermined adaptive control according to the grasped tendency.

Pixel information readout method and image pickup apparatus

A telescopic differential operational amplifier circuit for use in a pipelined A/D converter is provided with two auxiliary differential amplifiers connected to two cascode circuits, each including cascode-connected first to fourth transistors. During the sampling phase, first and second switches are turned on to apply a predetermined bias voltage to the gates of first and fourth transistors, and the input terminal of the differential operational amplifier circuit is set to a common mode voltage. During the hold phase, the first and second switches are turned off so that a voltage of each of the gates of the first and fourth transistors change to follow an input signal inputted via the input terminal with coupling capacitors operating as a level shifter of the input signal. Then the differential operational amplifier circuit performs push-pull operation operative only in a transconductance drive region, and is prevented from operating in a slewing region.

Differential operational amplifier circuit correcting settling error for use in pipelined A/D converter

An image capturing system includes a first camera, a second camera and a first rotating device. The first camera is configured to capture a first image. The second camera is configured to capture a second image whose scope is narrower than a scope of the first image. The first rotating device connects the first camera and the second camera. The first rotating device is configured to rotate the first camera and the second camera around a first rotational axis which is on the first rotating device.

Image capturing system employing different angle cameras on a common rotation axis and method for same

A sample hold circuit is provided for use in a time-interleaved A/D converter apparatus including a plurality of low-speed pipeline A/D converters which are parallelized. The sample hold circuit includes a sampling capacitor and a sample hold amplifier, and operates to sample and hold an input signal by using a switched capacitor. An adder circuit of the sample hold circuit adds a ramp calibration signal to the input signal, by inputting the ramp calibration signal generated to have a frequency identical to that of a sampling clock signal and a predetermined slope based on the sampling clock signal, into a sample hold amplifier via a calibration capacitor having a capacitance smaller than that of the sampling capacitor.

Sample hold circuit for use in time-interleaved A/D converter apparatus including paralleled low-speed pipeline A/D converters

In a photo detecting apparatus, a first capacitance is caused by a photo detecting element and the first capacitance is charged or discharged by current flowing through the photo detecting element. A second capacitance is connected in parallel with the photo detecting element, and the second capacitance charges or discharges an electric charge overflowing from the first capacitance. A current control element is connected to a terminal of the second capacitance on a side where the electric charge flows in, and the current control element delivers a current to cancel part of an electric charge when the electric charge overflowing from the first capacitance is stored in the second capacitance.

Photo detecting apparatus comprising a current control element

In a pipeline type A/D converter apparatus including A/D converter circuit parts connected in cascade with each other and A/D converting a sample hold signal in a pipeline form, each A/D converter circuit part includes a pre-A/D converter circuit for A/D converting an input signal into a digital signal, and a multiplying D/A converter circuit for D/A converting the digital signal into an analog control signal, and D/A converting the input signal by sampling, holding and amplifying the input signal using a sampling capacitor based on the analog control signal. A precharge circuit precharges a sampling capacitor before sampling so as to attain a predetermined output value in accordance with a digital input to output characteristic substantially adapted to an input to output characteristic of each A/D converter circuit part that presents an output signal corresponding to the input signal to each A/D converter circuit part.

Pipeline type A/D converter apparatus provided with precharge circuit for precharging sampling capacitor

A set of voltage output units outputs the light intensity detected by a photodetection device in the form of a voltage value. With the set of voltage output units, the capacitance of the cathode terminal of a photodiode PD provided within the pixel is charged or discharged using the photoelectric current. A current output unit outputs photoelectric current Iph flowing from the photodetection device. The current output unit includes a current output transistor provided between one terminal of the photodetection device and the data line. A pixel circuit effects control of the pixel so as to activate either the set of the voltage output units or the current output unit, thereby outputting either voltage value or photoelectric current to the data line connected to the pixel.

Photodetection apparatus with operation-mode switching between current output mode and voltage output mode

An A-D converter includes a first amplifier circuit, an A-D converter circuit, a D-A converter circuit, a subtraction circuit, a second amplifier circuit, a timing control circuit, a type control unit, an output unit. The type control unit sets the type of the A-D converter circuit at the time of conversion to the higher 4 bits, to a type in which either one of an analog signal or a reference voltage is inputted selectively to a comparator via a capacitor. The type control unit performs a control so that the type of the A-D converter circuit at the time of conversion to values of the higher 5th to 7th bits and the higher 8th to 10th bits from the most significant bit, to a type in which an analog signal and a reference voltage are inputted fixedly to a comparator without involving a capacitor.

Analog-to-digital converter

A pixel circuit includes a first detector which amplifies a voltage obtained by charging and discharging a capacitance with a photocurrent flowing through a photo detecting element and then outputs it to a first data line, and a second detector which outputs an electric charge stored in the capacitance by the photocurrent, to a second data line. The pixel circuit operates in a first operation mode where the first detector is activated, a second operation mode where the second detector is activated and an initialization mode where the photo detecting element is initialized. With a first transistor turned on, the second detector outputs an electric charge stored in the capacitance in the second operation mode, and in the initialization mode a reset voltage set in the second data line is applied to the other end of the photo detecting element to initialize the photo detecting element.

Photo detecting apparatus

A first bias voltage generating circuit which applies a bias voltage to an amplifier circuit of an AD converter has a driving unit and a control unit. The driving unit includes a first bias circuit and a second bias circuit as a plurality of bias circuits which are connected in parallel and have different current driving capabilities. The first bias circuit and the second bias circuit each include a CMOS transistor which is connected directly between a power supply potential and a ground potential, and a switching element which interrupts a feedthrough current. The drains of the CMOS transistors output the bias voltage. The control unit turns on both or either one of the first bias circuit and the second bias circuit, thereby controlling the current driving capability of the entire driving unit.

Pipelined AD converter capable of switching current driving capabilities

An input analog signal is fed to an amplifier circuit and an AD converter circuit. The AD converter circuit converts the input analog signal into a digital value of a predetermined number of bits, and outputs the digital value to an encoder (not shown) A DA converter circuit converts the digital value of a predetermined number of bits output from the AD converter circuit into an analog signal. The amplifier circuit samples and amplifies the input analog signal by a factor of &#x3b1; (greater than 1). A subtracter circuit subtracts an output of the DA converter circuit amplified by a factor of &#x3b1; from an output of the amplifier circuit.

Analog-digital converter with gain adjustment for high-speed operation

The present invention provides a widely general-purpose A/D converting device. The A/D converting device comprises multiple signal conversion units each of which include: an A/D converter for converting an input analog signal into a digital signal with a predetermined number of bits; a D/A converter for converting the output from the A/D converter into an analog signal; a subtracter for subtracting the output signal from the D/A converter, from the input analog signal; and an amplifier for amplifying the output signal from the subtracter. The A/D converting device has a configuration wherein the signal conversion units are arrayed in multiple rows and columns. This allows the user to realize an A/D converting device having various types and levels of performance by making various combinations of the signal conversion units without change of the layout of the signal conversion units.

Analog/digital converting device

An AD converter capable of achieving both an improved processing speed and a reduced circuit area in good balance. The AD converter pipelines analog-to-digital conversion by using a two-stage configuration consisting of a first conversion unit, or the prior stage, and a second conversion unit, or the subsequent stage. The first conversion unit is a conversion unit of noncyclic type. The second conversion unit is a conversion unit of cyclic type. The second conversion unit is given a conversion processing speed higher than that of the first conversion unit so that the second conversion unit performs cyclic processing twice while the first conversion unit performs conversion processing once.

Analog-to-digital converter cyclically repeating AD conversion

One or more input capacitors are connected to an inverting input terminal of an operational amplifier. Connected to the respective input capacitors are switches for on-off control of the input of an input signal, switches for on-off control of the input of another input signal, switches for on-off control of the input of a higher reference voltage and switches for on-off control of the input of a lower reference voltage. The switches for on-off control of the input of an input signal and the switches for on-off control of the input of another input signal are controlled by independent control signals.

Amplifier circuit and analog-to-digital circuit using the same

A first amplifier circuit samples and holds an input analog signal and outputs the same to a subtracting circuit. An AD converter circuit converts the input analog signal into a digital value so as to retrieve a predetermined number of bits. A DA converter circuit converts the digital value derived from conversion by the AD converter circuit into an analog value. A subtracter circuit subtracts an output analog signal from the DA converter circuit from the analog signal input via a first switch or the first amplifier circuit. A second amplifier circuit amplifies an output analog signal from the subtracter circuit by a gain of 2 and outputs the amplified signal. An input switching circuit controls the order of inputs, i.e. the input analog signal and a reference voltage, to voltage comparison elements constituting the Ad converter circuit.

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Ogaki, Japan

Kuniyuki Tani