Kabushiki Kaisha Toshiba

Kunio Yoshihara

Yuji Iseki

Yasushi Shizuki

Takeshi Miyagi

Hiroshi Yamada

Mitsuo Konno

Eiji Takagi

Takeshi Hanawa

Kazuhiro Matsumoto

Chiaki Takubo

Kazuhito Higuchi

Ayako Takagi

Toshiyuki Umeda

Toshiyuki Terada

Atsuko Iida

Jun Hanari

Tamio Saito

Kouhei Morizuka

Motoyasu Morinaga

Naoko Ono

Kazuki Tateyama

Shoichi Shimizu

Takashi Togasaki

Toshio Sudo

Hirotsugu Wakimoto

Yasuo Ashizawa

Junko Akagi

Nobuo Koide

Junichi Kudo

Yumi Fuchida

Yasuhiro Kuriyama

Shigeyuki Oe

A semiconductor device includes a wiring board having a main surface and a plurality of pad electrodes formed on the main surface, a rectangular semiconductor element having a main surface facing the main surface of the wiring board and mounted on the main surface of the wiring board, a solder resist formed to surround the semiconductor element with a preset distance therefrom on the main surface of the wiring board, a plurality of terminal electrodes formed on the end portion of the main surface of the semiconductor element, and a plurality of solder bumps for electrically connecting the plurality of pad electrodes to the plurality of terminal electrodes with a gap provided between the main surface of the wiring board and the main surface of the semiconductor element, wherein each of the plurality of pad electrodes includes at least a portion which extends from substantially under a corresponding one of the plurality of terminal electrodes of the semiconductor element to the solder resist lying outside the semiconductor element and each of the plurality of solder bumps includes a portion extending over part of a corresponding one of the plurality of pads which lies outside the semiconductor element.

Semiconductor device and soldering portion inspecting method therefor

Disclosed is an ultra high frequency radio communication apparatus having: a receiver antenna; a transmitter antenna; an IC chip being electrically connected to the receiver antenna and the transmitter antenna; a substrate on which the receiver antenna, the transmitter antenna and the IC chip are mounted; an input terminal for inputting to the IC chip a base band input signal; an output terminal for outputting a base band output signal from the IC chip; and a control signal terminal for inputting a control signal for controlling the IC chip to the IC chip. The IC chip is placed in a shielding space such that the cut-off frequency of the shielding space is higher than the frequency of a carrier signal for radio communication.

Ultra high frequency radio communication apparatus

An output circuit comprising a pair of input-stage transistors supplied with an input signal, a pair of output-stage differential transistors constructing an output-stage differential circuit, a pair of wiring lines having first ends connected to the input-stage transistors, respectively, and second ends connected to the bases of the output-stage differential transistors and connecting the input-stage transistors and the output-stage transistors, respectively, a pair of input-stage constant current sources connected to the bases of the output-stage differential transistors, respectively, at the second terminals, and an output-stage constant current source connected to the output-stage differential transistors.

Output circuit and output circuit device

A semiconductor device wherein a sealing resin is filled in a space between an interconnecting wiring board and a semiconductor chip after the semiconductor chip is flip chip-mounted on the wiring board in which at least a non-planar region consisting of a through hole, a concave portion or a convex portion, or a region exhibiting poor wettability to the sealing resin is formed on the surface of the wiring board or the semiconductor chip so as to provide a void in the sealed resin filled between the wiring board and the semiconductor chip for the purpose of minimizing any bad influence from the sealing resin on the interconnecting wirings or elements formed on the semiconductor chip.

Semiconductor device

A wiring board for high-frequency signals, which comprises, a substrate, a dielectric layer formed on the substrate and provided on its surface with a U-shaped groove having an arcuate bottom for forming a wiring therein, and a signal wiring formed in the U-shaped groove, which is featured in that an upper end portion of the signal wiring is protruded out of the surface of the dielectric layer. A distance (H) from a protruded top surface of the signal wiring to a bottom of the U-shaped groove and a width (W) of the U-shaped groove preferably meet a relationship of 2&lt;(W/H)&lt;50, and the height of the portion of signal wiring which is protruded out of the surface of the dielectric layer is preferably in the range of 10 nm to 10 .mu.m.

Wiring board for high-frequency signals and semiconductor module for

A multilayer wiring structure comprising a substrate, two line layers, and an interlayer insulating film. The first line layer consists of strip-shaped power/ground lines which extend parallel to one another. The second line layer is located above or below the first line layer, extends substantially parallel to the first line layer. The second line layer consists of strip-shaped signal lines which extend parallel to one another and at an angle to the strip-shaped power/ground lines of the first line layer in a skewed position.

Multilayer wiring structure

According to this invention, level shift diodes and are connected between input nodes and output nodes through source follower MESFETs, and the output nodes are connected to a power supply through current source MESFETs and current supply resistors, thereby forming first and second level shift circuit units. A DC bias is applied to the gates of the current source MESFETs through resistors. At the same time, signals having phases opposite to input signals of the current source MESFETs are supplied to the current source MESFETs through capacitors, respectively. A current supply circuit has a gain in a high-frequency range.

High frequency gain differential signal circuit employing a level shift

A high-speed semiconductor integrated circuit device has a main circuit section formed on a substrate, and a capacitance section formed on the substrate to surround the main circuit section. The capacitance section is made up of two conductive layers, an upper layer being insulatively disposed above a lower layer. These layers are applied with a power source voltage and a ground voltage, respectively. High-speed signal lines insulatively traverse the capacitance section and are connected to the main circuit section. The capacitance section is disconnected in the region where each signal transmission line passes, and defines a micro-strip type signal transmission line path structure. A 'ladder'-shaped connection pattern is provided at each disconnected portion of the capacitance section, for electrically connecting a conductive layer arranged on one side of the disconnected portion to the corresponding layer arranged on the other side of the disconnected portion. The ladder-shaped connection pattern includes first and second parallel connection portions which extend at right angles to their corresponding signal transmission line. The impedance of the signal transmission line can be controlled by altering the horizontal pattern of the connection portions.

High-speed signal transmission line path structure for semiconductor

There is disclosed a digital integrated circuit device which has high-speed transistors of a selected type. A timing controller is incorporated in this device and performs timing control for an internal digital circuit. The timing controller includes a series-circuit of two flip-flop circuits serving as a frequency-dividing circuit for frequency-dividing a reference clock signal and generating an internal timing signal, and a switch circuit connected to a signal feedback line of these flip-flop circuits. In a normal mode, the switch circuit supplies the internal timing signal output from the flip-flop circuits to the digital integrated circuit. At a desired timing, the switch circuit performs a switching operation in response to a control signal, electrically disconnects the signal feedback line of the flip-flop circuits, and alternatively supplies an external timing signal externally supplied thereto to the digital integrated circuit.

Timing controller for high-speed digital integrated circuit

A circuit board comprises a substrate made of a semi-insulating or insulating material, an insulating layer formed on the substrate and having a lower dielectric constant than the dielectric constant of the substrate, and a plurality of wiring conductors formed at predetermined intervals on the insulating layer. The insulating layer has a thickness determined according to the distance between adjacent wiring conductors and equal to 0.5 to 2.5 times the distance noted above, for the purpose of reducing cross-talk noise.

Circuit board

Growing community of inventors

Kawasaki, Japan

Kunio Yoshihara