Nippon Electric Co., Ltd.

Nec Corporation

Kunio Aomura

Kenji Okada

Masahiko Nakamae

Fujiki Tokuyoshi

In a method of manufacturing semiconductor devices employing a trench isolation method in which trenches of different depth are formed in a silicon body and insulating materials are filled in these trenches, there is described the manufacturing method having a step of forming a first depth trench, filling with a first insulating material in the first depth trench, forming a second depth trench, which is formed relatively shallow and adjoins at least a part of the first trench and filling with a second insulating material in the second depth trench.

Method of manufacturing semiconductor devices using trench isolation

A semiconductor device includes terminals for use in monitoring characteristics of circuit elements formed therein. The terminals are formed of a layer of polycrystalline silicon and terminate in an enlarged area pad portion adapted to be contacted by a probe of an external characteristics-monitoring apparatus.

Semiconductor integrated circuit device including element for monitoring

A method for fabricating a semiconductor device includes the formation of a monitoring element in a substrate. The monitoring element has substantially the same structure and size as a circuit element on the device which is to be monitored. Polycrystalline electrodes are contacted to the semiconductor regions of the monitoring element and extend on an insulating film covering the surface of the substrate. The electrical characteristics of the monitoring element are measured by contacting probes of a measuring apparatus to portions of the polycrystalline electrodes.

Semiconductor device

In a semiconductor device including at least one active semiconductor region isolated by an oxide layer in a semiconductor substrate having a principal surface, at least two PN junctions, terminating at the oxide layer, are formed in the active region, by introduction of impurities into the active region with the active region surface never exposed during their formation. The junctions may partly reach the principal surface. The impurities may be introduced by ion implantation through a thin oxide film overlying the active region, and through use of other films placed on the oxide film, or by the known melt-through technique. At least one junction may be formed by epitaxial growth of a semiconductor layer of the opposite conductivity type.

Method of manufacturing PN junctions in a semiconductor region to reach

In a semiconductor integrated circuit, an insulating film is formed on a major surface of the substrate. An elongated wiring layer including a polycrystalline silicon layer is formed on the insulating layer. At least one metallic area is formed over the wiring layer except at the ends of the wiring layer.

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Tokyo, Japan

Kunio Aomura