Hitachi, Ltd.

Other

Renesas Technology Corp.

Hitachi Ulsi Systems Co., Ltd.

Hitachi Microcomputer System, Ltd.

Dai Nippon Printing Co., Ltd.

Texas Instruments Corporation

Renesas Electronics Corporation

Hitachi Chemical Company, Ltd.

Hitachi Cable, Inc.

Hitachi Microcomputer Engineering, Ltd.

Akita Electronics Systems Co., Ltd.

Kunihiro Tsubosaki

Kunihiko Nishi

Asao Nishimura

Akio Hasebe

Ichiro Anjoh

Masahiro Ichitani

Gen Murakami

Makoto Kitano

Sueo Kawai

Hiroyoshi Kokaku

Masanori Segawa

Hiroshi Kikuchi

Takashi Yokoyama

Akihiro Yaguchi

Takashi Yamazaki

Hiroshi Hozoji

Kazuyoshi Oshima

Aizo Kaneda

Shozo Nakamura

Junichi Saeki

Isamu Yoshida

Noriyuki Kinjo

Masatsugu Ogata

Syuuji Eguchi

Kazunari Suzuki

Chuichi Miyazaki

Ichiro Anjo

Ryosuke Kimoto

Yukiharu Akiyama

Tomoaki Kudaishi

Masanori Shibamoto

Hideki Tanaka

Hiromichi Suzuki

Tetsuro Matsumoto

Mitsuo Usami

Yoshinori Miyaki

Fujio Ito

Tetsurou Matsumoto

Akihiko Kameoka

Akira Nagai

Masahiko Ogino

Shuji Eguchi

Takafumi Nishita

Akihiko Iwaya

Masachika Masuda

Toshio Miyamoto

Junichi Arita

Masamichi Ishihara

Hiroshi Koyama

Toshihiro Shiotsuki

Takehiro Ohnishi

Noriou Shimada

Hiroaki Tanaka

Takahiro Naito

Satoshi Nakamura

Nobutake Tsuyuno

Masaru Miyazaki

Mamoru Mita

Makoto Morishima

Takafumi Konno

Michio Tanimoto

Norio Okabe

Shigeki Tanaka

Chikako Imura

Tokuji Toida

Rie Hattori

Taisei Jin

Shunji Koike

Toshiak Ishii

Masazumi Amagai

Darvin R Edwards

Lim T Beng

Chai T Chong

Yujiro Kajihara

Masnori Shibamoto

Atsushi Nakamura

Tamaki Wada

Mitsuaki Katagiri

Kazuya Takahashi

Hiroshi Watanabe

Hideki Sato

Ryoichi Kajiwara

Junichi Yamada

Satoru Ito

Toshiyuki Sakuta

Hidekazu Matsuura

Takehiro Shimizu

Daisuke Makino

Yoshihiro Nomura

Tomoko Higashino

Yo Shimazaki

Nobuo Ichimura

Hideo Inayoshi

Tokiyuki Seto

Takafumi Dohdoh

Yasuo Mori

Mituo Katou

Akira Suzuki

Kazumi Tameshige

Minoru Maruta

In order to improve the package body cracking resistance of an LSI package at the reflow soldering and to provide both a leadframe suitable for fabricating the LSI package according to the flexible manufacturing system and an LSI using the leadframe, the adhered area between a semiconductor chipand a resin is enlarged by making the external size of a die padsmaller than that of the semiconductor chip to be mounted thereon. Moreover, a variety of semiconductor chipshaving different external sizes can be mounted on the die padby cutting the leading ends of leadsto a suitable length in accordance with the external sizes of the semiconductor chips

Leadframe semiconductor integrated circuit device using the same, and method of and process for fabricating the two

The occurrence of a package crack in the back vicinity of a die pad is restrained by making the outward appearance of the die pad of a lead frame smaller than that of a semiconductor chip which is mounted on it, and also the occurrence of a package crack in the main surface vicinity of the semiconductor chip is restrained by forming a layer of organic material with good adhesion property with the resin that constitutes the package body on the final passivation film (final passivation film) that covers the top layer of conductive wirings of the semiconductor chip.

Method of manufacturing a semiconductor device

A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

Semiconductor device and manufacturing method thereof

A semiconductor device having a superior connection reliability is obtained by providing a buffer body for absorbing the difference of thermal expansion between the mounting substrate and the semiconductor element in a semiconductor package structure, even if an organic material is used for the mounting substrate. A film material is used as the body for buffering the thermal stress generated by the difference in thermal expansion between the mounting substrate and the semiconductor element. The film material has modulus of elasticity of at least 1 MPa in the reflow temperature range (200&#x2013;250&#xb0; C.).

Circuit tape having adhesive film semiconductor device and a method for manufacturing the same

Manufacturing method of a semiconductor device

A process is provided for the fabrication of a plastic molded type semiconductor device in which a die pad is formed to have a smaller area than a semiconductor chip to be mounted on a principal surface of the die pad and the semiconductor chip and die pad are sealed with a plastic mold. The semiconductor chip and the die pad are disposed within a cavity of a mold so that the clearance from the reverse surface of the die pad to the inside wall surface of the cavity opposite to the reverse surface of the die pad becomes narrower, by a length corresponding to the thickness of the die pad, than the clearance from the principal surface of the semiconductor chip to the inside wall surface of the cavity opposite to the principal surface of the semiconductor chip; and a resin is poured from a center gate into said cavity to form a plastic mold, which makes it possible to prevent said semiconductor chip from being lifted upwardly by the resin flowing in a filling region on the reverse surface side of the semiconductor chip. As a result, inconvenient shifting of the semiconductor chip, bonding wires and the like in the plastic mold can be prevented, leading to an increase in the yield of the plastic molded type semiconductor device.

Plastic molded type semiconductor device and fabrication process thereof

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the 'Lead-On-Chip' or 'Chip-On-Lead' structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Semiconductor device

A semiconductor device comprises a semiconductor IC chip provided with electrode pads, and an insulating layer formed on a surface of the semiconductor IC chip, on the side of the electrode pads. Connecting terminals on the outer surface of the insulating layer and the electrode pads are connected by conductive posts. The insulating layer is formed of an insulating elastic material, and the conductive posts are formed of a conductive elastic material.

Semiconductor device and method of fabricating the same

The semiconductor device comprises an insulation layer formed on surfaces of semiconductor chips where the electrodes are formed, and a wiring layer formed on the insulation layer. The wiring layer formed on the insulation layer and the electrodes of the semiconductor chips are electrically connected to each other via connection members, such as wire bumps, etc. formed on the electrodes of the semiconductor chip.

Semiconductor device and method for fabricating the semiconductor device

In a semiconductor device having a heat radiation plate, the tips of inner leads connected to a semiconductor chip have a lead width w and a lead thickness t, the width being less than the thickness. The inner leads are secured to the heat radiation plate. Fastening the inner leads to the heat radiation plate supports the latter and eliminates the need for suspending leads. A lead pitch p, the lead width w and lead thickness t of the inner lead tips connected to the semiconductor chip have the relations of w<t and p&lE;1.2t, with the inner leads secured to the heat radiation plate. The heat radiation plate has slits made therein to form radially shaped heat propagation paths between a semiconductor chip mounting area and the inner leads. In a molding member-sealed semiconductor device wherein the semiconductor chip is fixed to the heat radiation plate, the tip thickness t&prime; of the inner leads is made less than the thickness t of the other portions of the inner leads secured to the heat radiation plate.

A semiconductor device having a superior connection reliability is obtained by providing a buffer body for absorbing the difference of thermal expansion between the mounting substrate and the semiconductor element in a semiconductor package structure, even if an organic material is used for mounting substrate. A film material is used as the body for buffering the thermal stress generated by the difference in thermal expansion between the mounting substrate and the semiconductor element. The film material has modulus of elasticity of at least 1 MPa in the reflow temperature range (200-250&deg; C.).

Circuit tape having adhesive film, semiconductor device, and a method for manufacturing the same

A semiconductor chip is disposed within a device hole as formed in a tape base material of a tape carrier , which chip is smaller in thickness than the tape base material , and then sealing is performed by a seal resin to permit both the principal surface and back surface of such semiconductor chip to be coated therewith. And, the position of the semiconductor chip in a direction along the thickness of the tape base is set to correspond to a stress neutral plane of the TCP as a whole.

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the &ldquo;Lead-On-Chip&rdquo; or &ldquo;Chip-On-Lead&rdquo; structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Growing community of inventors

Hino, Japan

Kunihiro Tsubosaki