Growing community of inventors

Tokyo, Japan

Kunihiro Terasaka

Average Co-Inventor Count = 6.75

ph-index = 3

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 58

Kunihiro TerasakaAkihito Yamamoto (2 patents)Kunihiro TerasakaKikuo Yamabe (2 patents)Kunihiro TerasakaHideyuki Kobayashi (2 patents)Kunihiro TerasakaNaohiko Yasuhisa (2 patents)Kunihiro TerasakaSouichi Nadahara (2 patents)Kunihiro TerasakaRiichiro Shirota (1 patent)Kunihiro TerasakaSeiichi Aritome (1 patent)Kunihiro TerasakaKazuhiro Shimizu (1 patent)Kunihiro TerasakaTadashi Iguchi (1 patent)Kunihiro TerasakaHiroaki Tsunoda (1 patent)Kunihiro TerasakaKazuhito Narita (1 patent)Kunihiro TerasakaHirohisa Iizuka (1 patent)Kunihiro TerasakaNaoki Koido (1 patent)Kunihiro TerasakaKunihiro Terasaka (3 patents)Akihito YamamotoAkihito Yamamoto (50 patents)Kikuo YamabeKikuo Yamabe (19 patents)Hideyuki KobayashiHideyuki Kobayashi (6 patents)Naohiko YasuhisaNaohiko Yasuhisa (3 patents)Souichi NadaharaSouichi Nadahara (2 patents)Riichiro ShirotaRiichiro Shirota (185 patents)Seiichi AritomeSeiichi Aritome (98 patents)Kazuhiro ShimizuKazuhiro Shimizu (59 patents)Tadashi IguchiTadashi Iguchi (49 patents)Hiroaki TsunodaHiroaki Tsunoda (38 patents)Kazuhito NaritaKazuhito Narita (23 patents)Hirohisa IizukaHirohisa Iizuka (21 patents)Naoki KoidoNaoki Koido (9 patents)
..
Inventor’s number of patents
..
Strength of working relationships

Company Filing History:

1. Kabushiki Kaisha Toshiba (3 from 52,766 patents)


3 patents:

1. 6462373 - Nonvolatile semiconductor memory device having tapered portion on side wall of charge accumulation layer

2. 5885905 - Semiconductor substrate and method of processing the same

3. 5502010 - Method for heat treating a semiconductor substrate to reduce defects

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