Hitachi, Ltd.

Renesas Technology Corp.

Solid State Storage Solutions LLC

Hitachi Ulsi Systems Co., Ltd.

Renesas Electronics Corporation

Hitachi Keiyo Engineering Co., Ltd.

Other

Hitachi Ulsi Engineering Corp.

S4, Inc.

Hitachi Engineering Co., Ltd.

Hitachi Ulsi

Kunihiro Katayama

Takayuki Tamura

Takashi Tsunehiro

Kenichi Kaki

Hajime Yamagami

Kiyoshi Inoue

Shigemasa Shiota

Masashi Naito

Takeshi Furuno

Yoshihiro Hayashi

Kouichi Terada

Motoki Kanamori

Atsushi Shikata

Nagamasa Mizushima

Jun Kitahara

Tsunehiro Tobita

Satoshi Watatani

Atsushi Shiraishi

Motoyasu Tsunoda

Shigeo Kurakata

Takashi Totsuka

Takeshi Suzuki

Takeshi Wada

Ryuichi Hattori

Yukihiro Seki

Takashi Kikuchi

Takao Okubo

Masamichi Kishi

Shigeru Kadowaki

Manabu Saito

Yosio Takaya

Kazunori Furusawa

Hidefumi Oodate

Kazuo Nakamura

Yusuke Jono

Masaharu Ukeda

Tomihisa Hatano

Koichi Kimura

Satoshi Yoshida

Toshio Tanaka

Atsushi Nozoe

Seiji Kobayashi

Naoki Kobayashi

Takayuki Kawahara

Hideaki Kurata

Akira Kanehira

Shinichi Fukasawa

Takeo Kon

Yuji Satou

Tetsuya Iida

Junichi Maruyama

Yasuhiro Nakamura

Shinya Iguchi

Shinsuke Asari

Yoshinori Mochizuki

Kazuto Izawa

Masato Matsumoto

A storage device, including: a non-volatile semiconductor memory which is electrically erasable; a system interface coupled with an external host system; and a controller reading data from the non-volatile semiconductor memory and transmitting data to the host system via the system interface in response to a read command received by the system interface from the host system; and wherein the controller starts reading (N+n)th sector data from the non-volatile semiconductor memory, while the controller transmits Nth sector data that has been read from the non-volatile semiconductor memory to the host system via the system interface, in response to the read command for successive sector data.

External storage device and memory access control method thereof

A nonvolatile memory apparatus includes a control unit, a main storage medium with an electrically reloadable nonvolatile memory adapted to be operable even when faulty memory cells exist therein, and a storage region storing registered address values of faulty regions of the main storage medium containing the faulty memory cells. Data which is stored in the electrically reloadable nonvolatile memory is divided into blocks, each block having a plurality of data to be administrated and which is assigned an access address by the control unit. An administrative information region is provided in each block. The control unit carries out access requests of the main storage medium and the administration of faulty regions and the number of occurrences of reloading of respective memory cells of the main storage medium.

Semiconductor memory device having faulty cells

A mobile communication terminal device whose authentication and settlement functions by noncontact proximity communication can be continuously used even after operating voltage from battery power drops is provided. Only when the supply of required power from a battery is lost, a security controller is controlled into a mode in which it operates with low power consumption and noncontact authentication and settlement functions are ensured by external electromagnetic field power. Specifically, the following is implemented: when there is the supply of required power from the battery, it is made possible to carry out high-performance, multifunctional authentication and settlement processing making good use of high-speed processing, mass storage, and the like which are the advantages of the security controller essentially driven by battery; and in an anomalous instance in which the battery remaining capacity is lost, it is made possible to carry out minimal authentication and settlement processing.

Mobile communication terminal device

In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories.

Nonvolatile memory with faulty cell registration

A mobile communication terminal device whose authentication and settlement functions by noncontact proximity communication can be continuously used even after operating voltage from battery power drops is provided. Only when the supply of required power from a battery is lost, a security controller is controlled into a mode in which it operates with low power consumption and noncontact authentication and settlement functions are ensured by external electromagnetic field power. Thus the noncontact authentication and settlement functions can be used even after the battery remaining capacity is lost by use of a communication function for the principal purpose. Specifically, the following is implemented: when there is the supply of required power from the battery, it is made possible to carry out high-performance, multifunctional authentication and settlement processing making good use of high-speed processing, mass storage, and the like which are the advantages of the security controller essentially driven by battery; and in an anomalous instance in which the battery remaining capacity is lost, it is made possible to carry out minimal authentication and settlement processing.

In a nonvolatile memory apparatus, a system bus receives address, command, and/or control signals. Memory cells store bits of data by shifting a threshold voltage to one of plural ranges. In writing a first page, the threshold voltage of a first memory cell remains in a first range or shifts into a second range. In writing a second page, the threshold voltage remains in the first or second voltages, or shifts into a third range from the first range or into a fourth range from the second range. Before writing the second page, the memory reads data from the first memory cell for generating the second page writing data. A shifting direction of the threshold voltage from the first to the second range is the same as a shifting direction from the first to the third range.

Semiconductor memory having electrically erasable and programmable semiconductor memory cells

An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected from a plurality of states including at least first to fourth level states, in response to information to be stored in the one memory cell, and reading the status of the memory cell to determine whether the read out status corresponds to one of the first to fourth level states by utilizing a first reference level set between the second and third level states, a second reference level set between the first and second level states and a third reference level set between the third and fourth level states.

In the initial setting of a memory card, the flash check data FD stored in a flash memoryis read out, this data FD is compared with the operation check data FDstored previously in the ROM, the write check data FDstored in the ROMis written, if a fault is not detected, to the flash memory, and this data is read again and is compared with the write check data. FDof the ROM. When any fault is not detected in comparison of these data, the CPU determines that the flash memoryis normal. Moreover, if a fault is detected in the comparison of data, the CPU sets the reset process fault data to a registerto set a controllerto the sleep mode. When the command CMD is received during this period, data comparison is executed again.

Memory card and its initial setting method

A semiconductor disk wherein a flash memory into which data is rewritten in block unit is employed as a storage medium, the semiconductor disk including a data memory in which file data are stored, a substitutive memory which substitutes for blocks of errors in the data memory, an error memory in which error information of the data memory are stored, and a memory controller which reads data out of, writes data into and erases data from the data memory, the substitutive memory and the error memory. Since the write errors of the flash memory can be remedied, the service life of the semiconductor disk can be increased.

Storage device employing a flash memory

A semiconductor storage apparatus is coupled with a system bus to receive a write request accompanied with first and second blocks of data, which are stored in nonvolatile semiconductor memories. A control device sends a first erase command to one of the nonvolatile memories to initiate a first internal erase operation of data within the nonvolatile memories. After the first erase command has been sent, the control device sends a second erase command to another one of the nonvolatile memories, to initiate a second internal erase operation of data within the other nonvolatile memory.

Semiconductor storage device

In order to protect the user security data, provided is a memory card capable of preventing the data leakage to a third party not having the access authority by imposing the limitation on the number of password authentications and automatically erasing the data. In a system comprised of a multimedia card and a host machine electrically connected to the multimedia card and controlling the operations of the multimedia card, a retry counter for storing the number of password authentication failures is provided and the upper limit of the number of failures is registered in a register. When passwords are repeatedly entered once, twice, . . . and n times and the retry counter which counts the entries reaches the upper limit of the number of failures, the data is automatically erased so as not to leave the data in the flash memory.

Memory card

A controllerof a memory card is a provided with a command decoding circuitfor decoding commands issued by a host HT, a command enable registerin which the validity or invalidity of the received command, and a command detection signal generating circuitfor detecting a valid command on the basis of the result of decoding by the command decoding circuitand a value set by the command enable register. If the command enable registerreceives a validly set command, the command detection signal generating circuitwill supply a detection signal to a control unitto execute processing prescribed for each command. the command enable registerreceives an invalidly set command, no detection signal will be supplied, and the command will be ignored.

Memory card and data rewriting method

Growing community of inventors

Chigasaki, Japan

Kunihiro Katayama