Nippon Telegraph and Telephone Corporation

Kunihiro Arai

Hideaki Matsuzaki

Takatomo Enoki

Naoteru Shigekawa

A semiconductor functional device includes a semi-insulating semiconductor substrate; a resonant tunneling structure which includes, on the substrate, an n-type collector layer, an epitaxial multilayer structure including a double barrier structure constituted of a plurality of barrier layers holding a well layer therebetween, and an n-type emitter layer; an emitter electrode formed on the emitter layer; and a collector electrode formed on the collector layer. An undoped semiconductor barrier layer is interposed between the semi-insulating semiconductor substrate and the collector layer. With respect to a width of the emitter electrode, a thickness and an impurity concentration of the collector layer are selected such that the collector layer is pinched off when a potential difference generated between the emitter layer and the collector layer is equal to a valley voltage of I-V characteristics of the resonant tunneling structure constituted between the emitter layer and the collector layer while electrons travel from the emitter electrode toward the collector electrode through the emitter layer, the epitaxial multilayer structure and the collector layer. Consequently, the I-V characteristics have a single peak so as to satisfactorily suppress an increase in current if an applied voltage is higher than the valley voltage. Moreover, it is possible to achieve an electronic circuit provided with the semiconductor functional device having a large design margin and a large fabrication tolerance.

Semiconductor functional device and electronic circuit provided with the

A first partial circuit is formed by grounding the emitter electrode of a first negative differential resistive element, connecting the emitter electrode of a second negative differential resistive element to the collector electrode of the first negative differential resistive element, and connecting a first field-effect transistor in parallel with the first negative differential resistive element. A second partial circuit is formed by grounding the emitter electrode of a third negative differential resistive element, connecting the emitter electrode of a fourth negative differential resistive element to the collector electrode of the third negative differential resistive element, and connecting a second field-effect transistor in parallel with the third negative differential resistive element. An output from the first partial circuit is input to the input of the second partial circuit. The inversion of the output of the second partial circuit is input to the input of the first partial circuit. A clock signal and a signal whose phase is opposite to that of the clock signal are applied to the collector electrodes of the second and fourth negative differential resistive elements, respectively. A frequency-divided signal of the clock signal is output from each partial circuit.

Periodic waveform generating circuit

A heterojunction field-effect transistor includes a first electron transit channel formation semiconductor layer formed on a substrate and consisting of a compound semiconductor, a first electron supply semiconductor layer formed on the first electron transit channel formation semiconductor layer and consisting of a compound semiconductor, a gate electrode, a source electrode, and a drain electrode formed on the first electron supply semiconductor layer, and a second electron transit channel formation semiconductor layer formed between the substrate and the first electron transit channel formation semiconductor layer. The second electron transit channel formation semiconductor layer consists of a cmpound semiconductor which has electron affinity smaller than that of the first electron transit channel formation semiconductor layer and larger than that of the first electron supply semiconductor layer, and is different from the first electron transit channel formation semiconductor layer in field strength position where a maximum value of an electron velocity is obtained, and is arranged such that an energy level on a bottom of an electron conduction band of the second electron transit channel formation seimconductor layer is substantially the same as a Fermi level.

Growing community of inventors

Kanagawa, Japan

Kunihiro Arai