Nippondenso Co., Ltd.

Denso Corporation

Inter-university Research Institute Corporation National Institutes of Natural Sciences

Genesis Research Institute, Incorporated

Other

Denson Corporation

Kunihiko Hara

Yasutoshi Suzuki

Hiroshi Itoh

Shinya Ohmi

Tsuyoshi Fukada

Norihito Tokura

Tsuyoshi Yamamoto

Eiichi Okuno

Takunori Taira

Mitsuhiro Kataoka

Kazukuni Hara

Rajesh Kumar

Shoichi Onda

Atsushi Watanabe

Osamu Ina

Shigeo Asai

Hajime Inuzuka

Hiromochi Muramatsu

Katsuo Aoki

Masao Yamawaki

Yoshio Oka

Takao Suzuki

Hironari Kuno

Jun Akiyama

Yuichi Takeuchi

Yoshiaki Fukushima

Shigeki Takahashi

Takeshi Miyajima

Takeshi Endo

Masami Naito

Naoto Okabe

Nobuo Kamiya

Takeshi Fukazawa

Naohiro Sugiyama

Toshihiko Tani

Fusao Hirose

Tsuyoshi Nakagawa

Hiroaki Wakayama

Kouichi Hoshino

Yasuhiro Horiuchi

Jun Kojima

Atsuto Okamoto

Takamasa Suzuki

Naomi Awano

Hirohiko Saito

Hiroyasu Ito

Haruyoshi Kuriyama

Takashi Onoda

Takeshi Hasegawa

Hiroyasu Itoh

Ryo Sato

Upon producing a transparent polycrystalline material, a suspension liquid (or slurry) is prepared, the suspension liquid being made by dispersing a raw-material powder in a solution, the raw-material powder including optically anisotropic single-crystalline particles to which a rare-earth element is added. A formed body is obtained from the suspension liquid by means of carrying out slip casting in a space with a magnetic field applied. On this occasion, while doing a temperature control so that the single-crystalline particles demonstrate predetermined magnetic anisotropy, one of static magnetic fields and rotary magnetic fields is selected in compliance with a direction of an axis of easy magnetization in the single-crystalline particles, and is then applied to them. A transparent polycrystalline material is obtained by sintering the formed body, the transparent polycrystalline material having a polycrystalline structure whose crystal orientation is controlled.

Transparent polycrystalline material and production process for the same

Upon producing a transparent polycrystalline material, a suspension liquid (or slurry) is prepared, the suspension liquid being made by dispersing a raw-material powder in a solution, the raw-material powder including optically anisotropic single-crystalline particles to which a rare-earth element is added. A formed body is obtained from the suspension liquid by means of carrying out slip casting in a space with a magnetic field applied. On this occasion, while doing a temperature control so that the single-crystalline particles demonstrate predetermined magnetic anisotropy, one of static magnetic fields and rotary magnetic fields is selected in compliance with a direction of an axis of easy magnetization in the single-crystalline particles, and is then applied to them. A transparent polycrystalline material is obtained by sintering the formed body, the transparent polycrystalline material having a polycrystalline structure whose crystal orientation is controlled. In this calcination step, after subjecting the formed body to primary sintering at a temperature of 1,600-1,900 K, the resulting primarily-sintered body undergoes hot-isotropic-press sintering (or HIP processing) at a temperature of 1,600-1,900 K.

A semiconductor device, comprising: a semiconductor substrate comprising silicon carbide of a first conductivity type; a silicon carbide epitaxial layer of the first conductivity type; a first semiconductor region formed on the semiconductor substrate and comprising silicon carbide of a second conductivity type; a second semiconductor region formed on the first semiconductor region, comprising silicon carbide of the first conductivity type and separated from the semiconductor substrate of the first conductivity type by the first semiconductor region; a third semiconductor region formed on the semiconductor region, connected to the semiconductor substrate and the second semiconductor region, comprising silicon carbide of the first conductivity type, and of higher resistance than the semiconductor substrate; and a gate electrode formed on the third semiconductor region via an insulating layer; wherein the third semiconductor layer is depleted when no voltage is being applied to the gate electrode so that said semiconductor device has a normally OFF characteristic.

Silicon carbide semiconductor device

A vertical type power MOSFET made of silicon carbide includes a surface channel layer doped with nitrogen as dopant with a concentration equal to or less than 1&times;10 cm . Accordingly, when a gate oxide film is formed on the surface channel layer, an amount of silicon nitride produced in the gate oxide film and at the interface between the gate oxide film and the surface channel layer becomes extremely small. As a result, carrier traps are prevented from being produced by silicon nitride, resulting in stable FET characteristics and high reliability to the gate oxide film.

Micropipe defects existing in a silicon carbide single crystal are closed within the single crystal. At least a portion of the micropipe defects opened on the surface of the silicon carbide single crystal (SiC substrate) is sealed up with a coating material. Then heat treatment is performed so as to saturate the inside of the micropipe defects with silicon carbide vapors. By this, the micropipe defects existing in the SiC substrate can be closed within the SiC substrate, not in a newly grown layer. Further, the micropipe defects can be efficiently closed by filling the micropipe defects with a silicon carbide material by preliminarily using super critical fluid and the like.

Method of manufacturing silicon carbide single crystal and silicon carbide single crystal manufactured by the same

In a silicon carbide semiconductor device such as a trench gate type power MOSFET, the film thickness and the impurity concentration of a thin film silicon carbide semiconductor layer formed on a trench side face to constitute an accumulation-type channel-forming region and enable the device to operate with a low gate voltage, low on-resistance and low power loss are set so that on impression of a reverse bias voltage a pn junction between a P-type epitaxial layer and an n.sup.- -type epitaxial layer undergoes avalanche breakdown before the thin film silicon carbide semiconductor layer undergoes punch-through. By this means it is possible to obtain a target high source-drain withstand voltage.

Silicon carbide semiconductor device and manufacturing method thereof

A manufacturing method of a vertical DMOSFET having a concave channel structure, which does not permit the introduction of defects or contaminant into the channel part and which can make the shape of the groove uniform, is disclosed. On a surface of a (100)-oriented n.sup.- -on-n.sup.+ epitaxial wafer is formed an initial groove by chemical dry etching. The grooved surface is then oxidized by LOCOS technique to form a LOCOS oxide film, whereby the concave structure is formed on the epitaxial wafer. The concave width is set to be at least twice the concave depth, and the sidewall angle is set to be approximately 50.degree. to make the sidewall plane (111) of high channel mobility plane. Following this process, p-type and n-type impurities are diffused from the main surface using the LOCOS oxide film as a double diffusion mask to form a body region and a source region.

Method of manufacturing a vertical semiconductor device

A vertical MOSFET, which can control AC current flowing through a device only by the gate voltage, is obtained. On an n.sup.+ silicon layer is formed an n.sup.- silicon layer. Within the n.sup.- silicon layer is formed a p-body region. Within the p-body region is formed an n.sup.+ source region. On top of a substrate are formed a source electrode in contact only with the source region and a base electrode in contact only with the p-body region. The source electrode and the base electrode are connected to each other through a resistance at the outside. On a channel region is formed a gate electrode through a gate oxide film (insulating film). When the above semiconductor device is in the reverse bias conduction, the exciting current is controlled only by the gate voltage by setting the current flowing from a source terminal through the resistance to the base electrode, the p-body region and the n.sup.- silicon layer to be negligibly small as compared with the current flowing from the source terminal through the source electrode to the n.sup.+ source region, the channel region and the n.sup.- silicon layer.

Semiconductor device including vertical MOSFET structure with suppressed

A silicon semiconductor substrate, on which an epitaxial layer is to be formed, is set in a reaction vessel having a heating mechanism, and a gas containing TMG and AsH.sub.3 is introduced into the reaction vessel with the substrate heated to 450.degree. C., thus forming, on the substrate, a low-temperature growth layer of amorphous or polycrystalline GaAs as a semiconductor substance having a different lattice constant from that of the substrate. Then, with the TMG removed from the introduced gas, the temperature of the semiconductor substrate is increased to 750.degree. C., to cause coagulation of atoms of the low-temperature growth layer, with a thermal treatment also being performed at this high temperature, to cause growth of island-like single crystal cores. Further, a high temperature growth process is conducted in a material gas atmosphere containing TMG, whereby a GaAs film is epitaxially grown on the semiconductor substrate surface.

Semiconductor device with vaporphase grown epitaxial

A vertical type semiconductor device is provided with an improved construction which greatly decreases the on-resistance without impairing the breakdown voltage thereof. In the fundamental DMOS cells that control a current to constitute the vertical semiconductor device, through-hole cells are arranged along the sides of a cell having a channel. The through-hole cell includes a through-hole extending from the surface of an n.sup.- -type drift region toward an n.sup.+ -type drain region, and also includes an n.sup.+ -type through-hole region that is formed by diffusing impurities from the inner wall of the through-hole which is continuous with the n.sup.+ -type drain region. A breakdown voltage of the element is maintained by the n.sup.- -type drift region between a p-type well region and the n.sup.+ -type through-hole region or the n.sup.+ -type drain region. Given the unique arrangement of the through-hole cells, the JFET resistance component becomes negligibly small between the DMOS cells neighboring along the sides of the cells despite the fact that the cells are finely formed, and a small on-resistance is exhibited.

Vertical type semiconductor device provided with an improved

A semiconductor strain sensor includes a silicon substrate, a strain resistive element and electrodes. The silicon substrate has a deformable portion which is deformed when stress is applied to it. The strain resistive element is formed on the deformable portion and has an at least a first layer and a second layer which form a heterojunction between them. The first layer is doped with impurities so that a two-dimensional carrier gas layer is formed in the second layer near the heterojunction. The two-dimensional carrier gas layer has carriers originating from the impurities. The electrodes electrically contact the two dimensional carrier gas layer. Change of resistance of the strain resistive element in accordance with the stress is detected through the electrodes.

Semiconductor strain sensor

A semiconductor device with a current detecting function in which in place of an external resistor for detecting an operation current such as drain current or collector current of a device such as an FET or bipolar transistor, a probe electrode is formed in proximity to the device depletion layer to connect therethrough with the device channel to generate a probe voltage corresponding to the operation current.

Semiconductor device with current detecting function

Dazzle-free mirror with photocell in a non-dazzle-free portion

A control apparatus for controlling the glare shield of a reflecting mirror of a vehicle, wherein the reflecting mirror is provided with on the upper half and lower half portions respectively first and second electro-optic elements whose transmittance of light being variable, and when a first photo detecting circuit determines that incident light on the reflecting mirror detected by an incident light detector is the direct sunlight, a first control circuit applies a voltage to the first electro-optic element to cause the upper half portion of the reflecting mirror to become a glare shield condition, and when a second photo detecting circuit determines that the incident light detected by an incident light detector is light of a headlight of a following vehicle, a second control circuit applies the voltage to the second electro-optic element to cause the lower half portion of the reflecting mirror to become the glare shield condition.

Control apparatus for two section, glare shield mirror

An apparatus for driving a liquid crystal element by an increased voltage and at a lowered frequency in conformity with temperature fall in the liquid crystal element so as to achieve complete driving of the element even in a low temperature range. In order to increase the driving voltage, the apparatus comprises a booster circuit for increasing a battery voltage, and a voltage divider circuit including an element-temperature sensor as a component thereof and serving to produce a control voltage by dividing the output voltage of the booster circuit. In such configuration, the booster circuit performs its operation in such a manner as to maintain constant the control voltage obtained from the voltage divider circuit.

Liquid crystal element driving apparatus

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Aichi, Japan

Kunihiko Hara