University of California

Leland Stanford Junior University

Rohm and Haas Electronics Materials LLC

Kuniharu Takei

Ali Javey

Peter Trefonas, Iii

Arash Hazeghi

Rachel A Segalman

H S Philip Wong

Yang Chai

Megan L Hoarfrost

Hyunhyub Ko

Toshitake Takahashi

A method of conductively coupling a carbon nanostructure and a metal electrode is provided that includes disposing a carbon nanostructure on a substrate, depositing a carbon-containing layer on the carbon nanostructure, according to one embodiment, and depositing a metal electrode on the carbon-containing layer. Further provided is a conductively coupled carbon nanostructure device that includes a carbon nanostructure disposed on a substrate, a carbon-containing layer disposed on the carbon nanostructure and a metal electrode disposed on the carbon-containing layer, where a low resistance coupling between the carbon nanostructure and metal elements is provided.

Methods of establishing low-resistance electrical contact to carbon nanostructures with graphitic interfacial layer

This disclosure provides systems, methods, and apparatus for flexible thin-film transistors. In one aspect, a device includes a polymer substrate, a gate electrode disposed on the polymer substrate, a dielectric layer disposed on the gate electrode and on exposed portions of the polymer substrate, a carbon nanotube network disposed on the dielectric layer, and a source electrode and a drain electrode disposed on the carbon nanotube network.

Carbon nanotube network thin-film transistors on flexible/stretchable substrates

Disclosed herein is a method for doping a substrate, comprising disposing a coating of a composition comprising a dopant-containing polymer and a non-polar solvent on a substrate; and annealing the substrate at a temperature of 750 to 1300&#xb0; C. for 1 second to 24 hours to diffuse the dopant into the substrate; wherein the dopant-containing polymer is a polymer having a covalently bound dopant atom; wherein the dopant-containing polymer is free of nitrogen and silicon; and wherein the method is free of a step of forming an oxide capping layer over the coating prior to the annealing step.

Doping of a substrate via a dopant containing polymer film

Semiconductor-on-insulator (XOI) structures and methods of fabricating XOI structures are provided. Single-crystalline semiconductor is grown on a source substrate, patterned, and transferred onto a target substrate, such as a Si/SiOsubstrate, thereby assembling an XOI substrate. The transfer process can be conducted through a stamping method or a bonding method. Multiple transfers can be carried out to form heterogenous compound semiconductor devices. The single-crystalline semiconductor can be II-IV or III-V compound semiconductor, such as InAs. A thermal oxide layer can be grown on the patterned single crystalline semiconductor, providing improved electrical characteristics and interface properties. In addition, strain tuning is accomplished via a capping layer formed on the single-crystalline semiconductor before transferring the single-crystalline semiconductor to the target substrate.

Semiconductor on insulator (XOI) for high performance field effect transistors

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Berkeley, CA, United States of America

Kuniharu Takei