Yamaha Corporation

Kuniaki Morita

Takayuki Kohdaka

Mituhiro Homme

Masamitu Hirano

Juhro Hoshi

Masao Noro

Tatsuya Kishii

Tatuya Kishii

The digital-to-analog conversion apparatus operates to convert an digital input into a corresponding analog output. A digital filter is provided for oversampling the digital input having a varying value represented in the form of multiple bits. A delta-sigma modulator operates to effect delta-sigma modulation of the oversampled digital input to reduce a number of the multiple bits for requantizing the oversampled digital input with a certain S/N ratio. A low-pass filter is provided for converting the requantized digital input into an analog output. A level detecting circuit is provided for detecting when the value of the digital input falls below a predetermined level. A shifting circuit is disposed upstream of the delta-sigma modulator and is responsive to the detected results for increasing the value of the digital input so as to improve the S/N ratio in the delta-sigma modulator. An attenuator is disposed downstream of the delta-sigma modulator and is responsive to the detected results for effecting decreasing compensation for the increased value of the digital input while substantially maintaining the improved S/N ratio so as to produce an analog output corresponding to the digital input.

Digital-to-analog converter with delta-sigma modulation

A mixing circuit that mixes a plurality of input signals are provided. A plurality of input terminals receive the input signals, respectively. A plurality of first resistors each providing input resistance each have one end thereof connected to a corresponding one of the input terminals, and another end thereof connected to corresponding ends of the other first resistors. A first amplifier has a positive input terminal to which the another end of each of the first resistors is commonly connected. A second resistor has one end connected to the output terminal of the first amplifier, and another end connected to the negative input terminal of the first amplifier. A second amplifier has a negative input terminal to which the another end of the second resistor is connected, with a positive input terminal thereof grounded. A plurality of third resistors are connected in series between the negative input terminal of the second amplifier and the positive input terminal of the first amplifier. The third resistors have nodes located between adjacent ones thereof, and a plurality of switches are connected between the respective nodes of the third resistors and the output terminal of the second amplifier. The input signals are mixed by the mixer circuit, and an output signal of the mixer circuit is generated from the output terminal of the first amplifier.

Mixer circuit

The digital-to-analog conversion apparatus operates in synchronization with a system clock signal having a short period to oversample and delta-sigma-modulate a digital input to produce a requantized digital signal. The system clock signal is mixed with noise leaked back due to the oversampling and delta-sigma modulating operation. The system clock signal is frequency-divided by the rate of one-fourth or less to produce a divided clock signal having a long period and being free of the noise. The requantized digital signal is detected each long period, and is pulse-modulated according to the detected results to generate a pulse signal having the long period. This pulse signal is low-pass-filtered to produce an analog output having improved S/N ratio.

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Hamamatsu, Japan

Kuniaki Morita