Fairchild Korea Semiconductor Ltd.

Samsung Electronics Co., Ltd.

Kunhee Cho

Donghwan Kim

Young-Je Lee

Sung-Yun Park

Dong-Hwan Kim

Gunhee Han

Dongmyung Lee

The present invention relates to a clock signal generating circuit and a power supply including the same. The present invention includes: a counter for counting one period of an input clock signal by using a reference clock signal, and generating a count signal; and a clock signal generator for receiving the count signal and the reference clock signal, dividing the count signal to generate a quotient and a remainder, setting the quotient as a reference period of an output clock signal, and distributing and disposing the remainder to the output clock signal with a plurality of periods occurring for one period of the input clock signal.

Clock signal generating circuit and power supply including the same

The switch control device controls a switching operation of a power switch. The switch control device includes an auxiliary power device. The auxiliary power device includes a parasitic capacitor, and charges the parasitic capacitor by receiving a power voltage to generate an auxiliary power voltage. The switch control device includes a control pulse generator driven by the auxiliary power voltage and generating a set pulse and a reset pulse according to an input signal that is input for controlling the switching operation of the power switch. The switch control device generates a gate signal that turns on the power switch by being synchronized with the set pulse and generates a gate signal that turns off the power switch by being synchronized with the reset pulse.

Switch control device

The present invention relates a pulse width filter generating a modulation signal that is increased in synchronization with one of an increasing edge and a decreasing edge of the input signal and is decreased in synchronization with the other of the increasing edge and the decreasing edge, and transmitting the input signal of the modulation signal. The input signal passed through the filter unit is inverted thereby being an output signal. The pulse width filter controls the increasing and the decreasing of the modulation signal according to the output signal and the input signal passed through the filter unit, and the modulation signal is a signal to determined whether the pulse width of the input signal is more than the predetermined cut-off pulse width.

Pulse width filter

A method of resetting a time-based CMOS image sensor may be provided, where the time-based CMOS image sensor may include a photodiode, a transfer transistor transferring photo-generated charges generated in the photodiode to a floating diffusion node and having a gate to which a ramp signal is input, and a reset transistor resetting the photodiode and the floating diffusion node. The method may include generating photo-generated charges at the photodiode, transferring the photo-generated charges to the floating diffusion node in response to a ramp signal; and resetting a reset electron potential of the photodiode to be higher than a reset electron potential of the floating diffusion node.

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Seoul, South Korea

Kunhee Cho