Winbond Electronics Corporation

Information Storage Devices, Inc.

Kung-Yen Su

Chun-Mai Liu

Albert V Kordesch

Hieu Van Tran

Wei-Fan Chen

James Brennan, Jr

Anthony Dunne

Peter Holzmann

Kaiman Chan

Kai-Man Chan

Geoff Jackson

A field oxide device (FOD) useful for electrostatic discharge (ESD) protection and other applications. The FOD is characterized as being capable of achieving a relatively low breakdown voltage and capable of handling relatively high currents during an ESD event. In general, the FOD includes a zener junction to promote an earlier breakdown of the device. The zener junction also provides a planar-like breakdown region which makes it capable of handling relatively high currents. In particular, the FOD includes a p-doped substrate having a drain-side n&plus; diffusion region and a source-side n&plus; diffusion region which are separated by a field oxide. The FOD further includes a p&plus; doped region that interfaces with the drain-side n&plus; diffusion region to form a zener junction. The breakdown voltage of the FOD can be easily set by controlling the doping concentration and energy of the p&plus; doped region. The FOD may additionally include one or more n&plus; regions at the respective boundaries of the drain-side and source-side n&plus; diffusion regions to provide improved junction curvature. In addition to the field oxide interposed between the drain-side and source-side n&plus; diffusion regions, field oxides can be added respectively at the drain and source ends to provide isolation from other devices within an integrated circuit.

Field oxide device with zener junction for electrostatic discharge (ESD) protection and other applications

A method for fabricating a triple self-aligned non-volatile memory device is disclosed. The method includes forming isolation oxide on a substrate. A plurality of floating gates are formed by depositing and self-aligning a first polysilicon layer to the isolation oxide. A common source area is then defined on the substrate between the floating gates. A second polysilicon layer is deposited over the common source area and self-aligned with respect to the isolation oxide. A third polysilicon layer is deposited adjacent to the plurality of floating gates. A plurality of select gates are then formed by self-aligning the third polysilicon layer to the isolation oxide. Furthermore, at least one drain area is defined on the substrate.

Method of making triple self-aligned split-gate non-volatile memory device

A silicon controlled rectifier (SCR) serving as an electrostatic discharge (ESD) protection device having a vertical zener junction for triggering breakdown. The SCR includes a p-doped substrate having an n-doped well, spaced-apart p and n doped regions for cathode connection formed within the n-doped well, and spaced-apart p and n doped regions for anode connection formed with the p-substrate external to the n-doped well. The SCR further includes a vertical zener junction situated between the anode n doped region and the n-well. The vertical zener junction has a p doped region sandwiched between two n doped regions. The n doped region of the vertical zener junction closest to the n-well may extend at least partially within the n-well, or be totally outside of the n-well. The SCR may further include respective field oxides between the anode p and n doped regions, between the anode n doped region and the vertical zener junction, and between the vertical zener junction and the n-doped well. Also provided is an n-doped substrate version of the SCR. The SCR with the vertical zener junction is characterized as having a relatively low breakdown voltage, having improved current handling capability for more reliable and robust operations, and having a breakdown voltage dependent on the doping concentration of the lighter doped p or n doped region of the vertical zener junction.

Vertical zener-triggered SCR structure for ESD protection in integrated circuits

An analog recording and playback system using non-volatile flash memory. An array of flash memory cells is used to store an analog signal and retrieve the stored analog signal on a real-time basis. A plurality of column driver circuits are coupled to the columns of flash memory cells for simultaneous programming and reading. A programming algorithm is used to write the analog signal within an operating range of the flash memory cells since the operating range may shift due to process variations. The system includes trimbit circuits to provide a trimmable initial programming voltage, programming step, programming current, read current, and select gate voltage. The system further includes a Serial Peripheral Interface ('SPI') that interfaces with a host microcontroller. The host microcontroller can send a number of commands to the system through the SPI for efficient message management. These commands include the basic commands to record or playback and various addressing and message cueing options. The system utilizes row and column redundancy to increase production yield.

Recording and playback integrated system for analog non-volatile flash

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San Jose, CA, United States of America

Kung-Yen Su