Lsi Logic Corporation

Lsi Corporation

Synopsys, Inc.

Kunal N Taravade

Gregory A Johnson

Neal Patrick Callan

Gayle W Miller

Paul G Filseth

Gail D Shelton

Charles W Jurgensen

Dodd Defibaugh

Lawrence S Melvin, Iii

Mario Garza

Nadya Strelkova

Brian R Lee

Brian S Ward

The present invention is directed to a method and system of intelligent dummy filling placement to reduce inter-layer capacitance caused by overlaps of dummy filling area on successive layers. The method and system treats each consecutive pair of layers together so as to minimize dummy filling overlaps between each layer. In particular, dummy fill features on each layer may be placed in a checkerboard pattern to avoid overlaps. As such, the present invention may eliminate large overlap area of the dummy patterns on consecutive layers by utilizing intelligent dummy filling placement.

Method and system for reducing inter-layer capacitance in integrated circuits

One embodiment of the present invention provides techniques and systems for modeling long-range extreme ultraviolet lithography (EUVL) flare. During operation, the system may receive an evaluation point in a layout. Next, the system may receive an EUVL model which includes kernels that are discretized at different sampling rates, and which have different sized ambits. Specifically, a kernel that is discretized using a low sampling rate may have a longer range than a kernel that is discretized using a high sampling rate. The system may then convolve the kernels with the layout at the evaluation point over their respective ambits. Next, the system may use the convolution results to determine an indicator value. The indicator value can be used for a number of applications, e.g., to predict pattern shapes that are expected to print on a wafer, to perform optical proximity correction, or to identify manufacturing problem areas in the layout.

Method and apparatus for modeling long-range EUVL flare

A method and system for detecting defects in a physical mask used for fabricating a semiconductor device having multiple layers is disclosed, where each layer has a corresponding mask. The method and system include receiving a digital image of the mask, and automatically detecting edges of the mask in the image using pattern recognition. The detected edges, which are stored in a standard format, are imported along with processing parameters into a process simulator that generates an estimated aerial image of the silicon layout that would be produced by a scanner using the mask and the parameters. The estimated aerial image is then compared to an intended aerial image of the same layer, and any differences found that are greater than predefined tolerances are determined to horizontal defects. In addition, effects that the horizontal defects may have on adjacent layers are analyzed to discover vertical defects.

Mask defect analysis for both horizontal and vertical processing effects

A system, apparatus and/or method is provided for fabricating an integrated capacitor during the fabrication of a transistor employing chemical mechanical polishing of a gate electrode of the transistor. Components of the integrated capacitor, particularly the lower electrode of a parallel plate capacitor in one form thereof, and an outer plate of a cylindrical-like capacitor in another form thereof, are defined by the polish stop layer during chemical mechanical polishing (CMP) of a gate of the transistor. According to an aspect of the subject invention, the polish stop layer may be an oxide or a nitride.

Method of fabricating an integral capacitor and gate transistor having nitride and oxide polish stop layers using chemical mechanical polishing elimination

A phase shift mask having transmission properties that are dependent at least in part on an intensity of an incident light beam. The phase shift mask has a mask substrate that is substantially transparent to the incident light beam. A first phase shift layer is disposed on the mask substrate. The first phase shift layer has a refractive index that is nonlinear with the intensity of the incident light beam. The refractive index of the first phase shift layer changes with the intensity of the incident light beam on the phase shift mask. By using a first phase shift layer on the phase shift mask that has a refractive index that is non linear with the intensity of the incident light beam, properties of a light beam transmitted through the first phase shift layer, such as interference patterns in the transmitted light beam, can be adjusted by adjusting the intensity of the incident light beam. Thus, in this manner there is provided an additional tool by which the exposure patterns produced by the phase shift mask can be adjusted. In other words, the transmission properties of the phase shift mask are adjustable with the intensity of the incident light beam.

Adjustable transmission phase shift mask

An intensity filter for deep UV lithography enhances contrast and also therefore increases the resolution of patterned images by passing only intensities that fall within a specific minimum threshold value, resulting in a more exact aerial image replicating the mask image. This device is a different approach to contrast enhancement that is distinguished from previous methods by eliminating the need for an extra layer of contrast enhancement on top of the resist, thereby reducing the number of processing steps in semiconductor fabrication.

Method and apparatus for enhancing image contrast using intensity filtration

An arrangement for controlling the transmission of a light signal is disclosed. The arrangement includes a first fiber optic line for transmitting the light signal and a light receiving unit operatively coupled to the first fiber optic line so that the light signal is received by the light receiving unit. The light receiving unit is operative to refract the light signal so that the light signal is substantially prevented from being transmitted through the light receiving unit if an intensity level of the light signal has a predetermined relationship with an intensity threshold level.

Arrangement and method for controlling the transmission of a light signal based on intensity of a received light signal

An attenuated phase shift mask is formed using a non-linear optical material for both fiducial features and pattern features. The non-linear optical material selected has predetermined transmission at the actinic exposure wavelength and a smaller transmission at the fiducial recognition wavelengths.

Chromeless phase shift mask using non-linear optical materials

A confinement device for operative arrangement within a substrate etching chamber, having a lower surface of the device generally arranged over a substrate outer top surface such that a gap-spacing therebetween is generally equidistant. This spacing is less than a sheath thickness for the plasma, preferably less than &#x2153;of an inner width of an aperture through the lower surface of the device. The aperture, sized preferably greater than 3 times the sheath thickness, is in communication with a channel of the device in which an etchant gas can be confined for reaction to selectively etch a localized area in the substrate outer top surface generally below the aperture. A system for dry etching an IC wafer includes a substrate etching chamber and a confinement device. The etchant gas may be a plasma induced and sustained by RF energy, a microwave source, or other source, as designed. And, a method is included for selectively etching a localized area in a substrate outer top surface, having the steps of: arranging a lower surface of a confinement device over the outer top surface, leaving a spacing therebetween, so that an aperture through said lower surface is located generally above the localized area (the spacing may cover the whole of the outer top surface, an area on which microcircuits are fabricated, or some other portion of the outer top surface); and providing an etchant gas to a channel in the device that is in communication with the aperture.

Confinement device for use in dry etching of substrate surface and method of dry etching a wafer surface

A circuit, gate, or device parameter simulation includes data on the initial conditions of manufacture, including illumination conditions on a stepper, material parameters for processing conditions, and chip layout. Optical effects and processing tolerances may be accounted for in the simulation of the final device performance characteristics. The circuit, gate, or device parameter simulation may incorporate optical proximity code software. Simulated active and passive components are generated by the circuit, gate, or device parameter simulation from the simulated patterned layers on the substrate. Feedback may be provided to the circuit, gate, or device parameter simulation to optimize performance.

Device parameter and gate performance simulation based on wafer image prediction

A method of fabricating an integrated circuit using photolithography and an antireflective coating. An antireflective coating is formed on a substrate wherein the antireflective coating is electrically polarizable. A photoresist coating is formed on the antireflective coating on a side opposite from the substrate and the photoresist is exposed to activating radiation. The antireflective coating is subjected to an applied electric field at substantially the same time as the photoresist is exposed to activating radiation. The radiation absorption coefficient of said antireflective coating is increased and the refractive index of said antireflective coating is changed to be substantially equal to the refractive index of said photoresist coating.

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Portland, OR, United States of America

Kunal N Taravade