Intersil Americas Inc.

Semtech Corporation

Kun Xing

Jia Wei

Shea Lynn Petricek

Wei Dong

Greg J Miller

Weihong Qiu

John Stuart Kleine

Eric Magne Solie

Shangyang Xiao

Steven M Granger

Min Mao

An embodiment of a power-supply controller includes first and second circuits. The first circuit is operable to cause a first current to flow through a first phase of a power supply. And the second circuit is operable to cause the second phase of the power supply to operate in a reduced-power-dissipation mode for at least a portion of a time period during which a second current magnetically induced by the first current flows through the second phase.

Coupled-inductor power-supply controller for operating a power supply in a reduced-power-dissipation mode

Described herein are systems and methods for providing a variable switching frequency for a power supply. The system includes a controller and a filter. The controller generates a switching frequency for a power supply. The switching frequency is modified as a function of an input voltage and an output voltage. The filter provides the output voltage to a load based at least in part on the switching frequency generated by the controller. In one example, the controller adaptively modifies the switching frequency as a function of the input voltage and the output voltage in order to maintain a peak to peak current for an inductor.

Adaptive switching frequency adjustment for a power supply

A voltage converter including a buck converter and a capacitive voltage divider. The converter includes four capacitors, a switch circuit, an inductor and a controller. A first capacitor is coupled between a reference node and a first output node which develops a first output voltage. A second capacitor is coupled between an input node and either the reference node or the first output node. The switch circuit couples a third capacitor between the reference and first output nodes in a first state of a PWM signal, and couples the third capacitor between the first output and input nodes in a second PWM signal state. The inductor is coupled to the third capacitor and provides a second output node coupled to the fourth capacitor providing a second output voltage. The controller controls the duty cycle of the PWM signal to regulate the second output voltage to a predetermined level.

Voltage converter with combined buck converter and capacitive voltage divider

An embodiment of an electronic component includes a circuit element disposed within a package, which includes a surface and at least one standoff protruding from the surface. For example, where the circuit element is an inductor in a power supply, the standoff may allow one to mount the inductor component over another component, such as a transistor component. Therefore, the layout area of such a power supply may be smaller than the layout area of a power supply in which the inductor and transistor components are mounted side by side.

Stackable electronic component

A pulse control clock generator for a voltage regulator including a comparator, a window circuit, a filter circuit, a ramp circuit, and a current circuit. The comparator compares a ramp voltage with a compensation voltage and provides a corresponding pulse control signal. The compensation voltage is indicative of output voltage error. The window circuit adds a window voltage to the compensation voltage to provide a hysteretic voltage. The filter circuit filters the hysteretic voltage to provide a filtered hysteretic voltage, such that a difference between the compensation voltage and the filtered hysteretic voltage is reduced in response to a load increase. The ramp circuit provides a repetitive ramp voltage which ramps between the filtered hysteretic voltage and the compensation voltage based on the pulse control signal. The current circuit increases a slope of the ramp voltage in response to the load increase.

PWM clock generation system and method to improve transient response of a voltage regulator

A modulator circuit for a switching regulator including first and second ramp generators, a comparator circuit and a reset circuit. The switching regulator provides a compensation voltage indicative of output voltage error. The ramp generators generate leading- and trailing-edge ramp voltages which are compared to the compensation voltage for determining pulses on a pulse modulation signal. The reset circuit prevents the leading-edge ramp voltage from resetting if the leading-edge ramp voltage has not reached the compensation voltage while ramping. The reset circuit further clamps the leading-edge ramp voltage until the pulse modulation signal is asserted again. In a multiphase configuration, each leading-edge ramp voltage is suspended if any leading-edge ramp voltage is clamped. An offset voltage may be added to the compensation, leading-edge, or trailing-edge voltages when a mode select signal indicates a reduced load condition. The offset voltage may be adjusted based on various operating conditions.

Method and apparatus for efficient transitioning between different operating modes of a regulator

A current sensing circuit with AC and DC temperature compensation for sensing current through an output inductor which has an inherent DC resistor with a temperature varying resistance. A first RC circuit is coupled across the output inductor and has a time constant. The first amplifier provides a sense signal indicative of voltage of the first RC circuit. The second RC circuit is coupled to a first correction node and receives the sense signal. The second resistor has a temperature varying resistance so that the second RC circuit has a time constant commensurate with a time constant of the output inductor. The third RC circuit is coupled to a second correction node and has a time constant equal commensurate with the first RC circuit. The second amplifier provides a corrected sense signal based on the correction nodes.

AC and DC temperature compensation scheme for DCR current sense

Conduction loss in the body-diode of a low side MOSFET of a power switching stage of one phase of a coupled-inductor, multi-phase DC-DC converter circuit, associated with current flow in the output inductor of that one phase that is induced by current flow in a mutually coupled output inductor of another phase, during normal switching of that other stage, is effectively prevented by applying auxiliary MOSFET turn-on signals, that coincide with the duration of the induced current, to that low side MOSFET, so that the induced current will flow through the turned-on low side MOSFET itself, thereby by-passing its body-diode.

Auxiliary turn-on mechanisms for reducing conduction loss in body-diode of low side MOSFET of coupled-inductor DC-DC converter

A hysteretic mode controller for controlling a capacitor voltage divider which has a flying capacitor. In one embodiment, the hysteretic mode controller includes an amplifier, a gain circuit and a hysteretic comparator circuit. The amplifier has an input for coupling to the flying capacitor and an output providing a fly voltage. The gain circuit has an input for receiving the input voltage and an output coupled to a reference node providing a reference voltage. The hysteretic comparator circuit has a first input coupled to the output of the amplifier, a second input receiving the reference voltage, and an output for providing a PWM signal to control the capacitor voltage divider. The fly voltage is compared to voltage limits of a hysteretic voltage window for switching the PWM signal. The switching frequency is increased with higher load current to maintain high efficiency.

Hysteretic mode controller for capacitor voltage divider

A battery charging and power delivery system for a portable electronic device includes a first connection that connects the system to an AC/DC power adaptor. A second connection connects the system to the power bus of the portable electronic device. A third connection connects the system to a battery. A capacitor voltage divider circuit provides power to the system power bus through the second connection and provides power through the third connection. A controller provides control signals to the capacitor voltage divider and to the AC to DC power adaptor.

System and method of charging a battery and power delivery using an adapter and capacitor voltage divider

A frequency control circuit including a controlled oscillator and an amplifier circuit is disclosed for providing a clock signal to a switched capacitor circuit which divides an input voltage to provide an output voltage. The controlled oscillator has a frequency control input receiving a frequency control signal and an output for providing the clock signal at a frequency based on the frequency control signal. The amplifier circuit has an input for receiving the output voltage and an output providing the frequency control signal based on droop of the output voltage. In one embodiment, the amplifier circuit adjusts the frequency control signal to optimize efficiency of the switched capacitor circuit over a voltage range of the output voltage, which changes based on load level.

Switching frequency control of switched capacitor circuit using output voltage droop

A DC-DC voltage converter is provided that includes a plurality of power channels and a controller. Each power channel is configured to provide a voltage output to an output node of the converter. Each power channel also includes a first sensing circuit configured to provide a primary feedback signal indicative of an output current of the power channel. Each power channel further includes an auxiliary sensing circuit to provided one or more auxiliary feedback signals indicative of an output current of each of the respective other power channels. The controller is configured to control each of the power channels based at least in part on the primary feedback signal and the one or more auxiliary feedback signals.

DC-DC voltage converter

Auxiliary turn-on mechanism for reducing conduction loss in body-diode of low side MOSFET of coupled-inductor DC-DC converter

A power management IC including a dual purpose pin, a fault detection system, and a fault signature system. The dual purpose pin performs a power management function during normal operation (e.g., a soft start pin coupled to an external capacitor, a set pin coupled to an external resistor, a frequency set pin coupled to a resistor-capacitor combination, etc.). The fault detection system senses any of multiple fault conditions and provides a corresponding fault indicator signal, each indicating a corresponding fault condition. The fault signature system generates a selected fault signature signal on the dual purpose pin, where each fault signature signal has a characteristic indicative of a corresponding fault condition. Thus, an existing pin on the IC is re-used to indicate the fault condition. The fault signature signal may be a unique voltage level, a unique charging rate, a unique frequency signal, or any a combination thereof.

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Cary, NC, United States of America

Kun Xing