Via Technologies, Inc.

Tian Holdings, LLC

Kun-Long Lin

Wei-Ming Su

Pei-Jei Hu

Wen-Jeng Chang

Meng-Huang Chu

Chiung-Ying Peng

Chih-Yung Chen

Yi-Chih Huang

Vincent Lin

An encoding method for recording gap regions or sectors having repeated data is disclosed. At least one sector is entirely encoded and stored in a memory buffer of the optical recording system. If the currently encoded are gap regions or sector having repeated data embedded in the fields of user data, only those portions affected by the modified header will be encoded to derive associated P code and Q code. The error detection code is firstly generated in the mode 1 standard when a gap region is encoded. P code is then encoded for those regions affected by the sequentially modified header and error detection code, while associated Q code is then derived according the modified header, error detection code, and P code. In the mode 2 form 1 and mode form 2 standards, only those regions affected by the sequentially modified header should be re-encoded again. Since the remaining portions employ the same data as the last encoded one in the memory buffer so that the encoding performance would be significantly upgraded whatever encoding standards are employed.

Encoding recording data on optical disks

A scrambling method for generating recording data onto a disc includes vertically scrambling main data, which is stored in DRAM, to generate PO, wherein the scrambled data due to generate PO is not stored in DRAM; then scrambling data again to generate PI; the scrambled data due to generating PI adds with ID, IED, RSV, EDC, PI, and PO, arranging in orders and recording onto a disc.

Optical recording method

An output clock is provided by a logic module and at least one flip-flop based on a reference clock. Each flip-flop receives the reference clock at a corresponding clock end and changes a signal level outputted at a corresponding output port according to rising or falling edges within each period of the reference clock. The logic module performs a logic operation among signals at each output port of the flip-flops to generate the output clock synchronized with the reference clock. Thereafter the output clock can be outputted through the data path provided by the logic module, and additional logical operations can be performed between the output clock and other signals.

Method and related apparatus for outputting clock through a data path

Encoding method for recording data on compack disk

A pad circuit and operating method for automatically adjusting gains is disclosed, wherein the pad circuit is embedded in an integrated circuit chip that further includes a core logic circuit therein. The pad circuit includes an input/output pin, a gain-adjustable output buffer, an input buffer and a signal feature detector. The method includes the steps as follows. A test signal is firstly issued from the core logic circuit to the gain-adjustable output buffer, while the test signal is then manipulated and outputted to an external device via the input/output pin. Next, a feedback test signal is fed into the input buffer from the external device, while a test result is realized according to a waveform feature of the feedback test signal. Finally, the gain of the gain-adjustable output buffer is adjusted according to the obtained test result.

Pad circuit and method for automatically adjusting gain for the same

A digital versatile disc (DVD) drive has a first memory for storing a region code and a source code, and a second memory for storing data temporarily. The method for changing the region code of the digital versatile disc drive comprises storing the source code in the second memory, and changing the region code in the first memory according to the source code stored in the second memory. The method and apparatus is capable of changing the region code of the digital versatile disc drive.

Method and apparatus for changing region code of digital versatile disc drive

A system for updating a flash memory of a peripheral device including a host sending an update content. The host sends an update content. The peripheral device contains a peripheral interface controller and a flash memory. The peripheral interface controller couples to the host, and the flash memory couples to the peripheral interface controller. When the peripheral interface controller detects a signal for updating the flash memory from the host, the peripheral interface controller updates the flash memory according to the update content.

System and method for updating flash memory of peripheral device

A method for transferring data from a large capacity data storage device to a host machine. The method requires the attachment of a plurality of SRAM memory blocks to an optical disk reader. Each SRAM memory block is used as temporary storage area got a sector of data so that data can be proofread one sector at a time. As soon as the entire sector is checked and corrected, the error-free data is transferred to an external DRAM memory. Thereafter, correct data can be read from the DRAM by the host machine at any time. The internal SRAM memory serves as a buffer holding sectors of data so that error detection and error correction of individual sector can be carried out. Additionally, the external DRAM memory serves as a buffer holding the correct data for the host machine.

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Taipei Hsien, Taiwan

Kun-Long Lin