International Business Machines Corporation

Kumar R Virwani

Mohit Bajaj

Kota V R M Murali

Rajan K Pandey

Hiroyuki Miyazoe

Aniruddha Konar

Arpan K Deb

Takashi Ando

James L Hedrick

Charles Thomas Rettner

Gloria W Y Fraczak

Jeannette M O'Brien

Robert G Biskeborn

Calvin S Lo

Kailash Gopalakrishnan

Willi Volksen

Robert L Bruce

Pawan Raghunath Chowdhary

Geoffrey W Burr

Jane Elizabeth Frommer

Donald Stimson Bethune

Geraud J Dubois

Fabio Carta

Rohit Sudhir Shenoy

Rajesh Sathiyanarayanan

Gavin O Jones

Andrew John Kellock

Philip M Rice

Teya Topuria

Krystelle Lionti

Hans Werner Horn

Bulent Nihat Kurdi

Gloria Wing Yun Fraczak

Gloria W Fraczak

Robin S King

A semiconductor device including stacked access device and resistive memory includes a stack disposed on a base structure, the stack including an access device stack and a resistive random-access memory (ReRAM) device stack, sidewall spacers disposed along a portion of the stack, a dielectric layer disposed over the stack, the sidewall spacers and the base structure, and an interlevel dielectric disposed on the dielectric layer.

Stacked access device and resistive memory

Embodiments relate to a system, program product, and method for use and an artificial intelligence (AI) platform to identify and analyze physical forces related to sensory input. A sensor operatively coupled to an inertial measurement unit (IMU) is activated. An initial position of the IMU responsive to the sensor activation is captured and movement of the IMU from the initial position is recognized. A comparison is preformed, where the captured initial position is compared to a second position which is correlated with the recognized movement. A score based on the performed comparison is determined and a diagnostic assessment based on the performed comparison and determined score is created. The diagnostic assessment is converted to feedback, where the conversion utilizes real-time communication of an instruction of a second movement position of the IMU. Receipt of the feedback physically conveys a manifestation of the feedback to the apparatus.

Interactive exercise experience

A combined semiconductor device is fabricated by forming a first access structure from a mixed ionic electronic conduction (MIEC) material. A first side of a first memory structure is electrically coupled with a first side of the first access structure to form the combination device. A subtractive etching process is applied to the combination device such that a surface of the combination device that is substantially orthogonal to a plane of a substrate of the semiconductor device is within a defined tapering tolerance.

Access device and phase change memory combination structure in backend of line (BEOL)

Polyhexahydrotriazine (PHT) film layers are formed by a process comprising heating a first mixture comprising i) a solvent, ii) paraformaldehyde, and iii) a diamine monomer comprising two primary aromatic amine groups at a temperature of about 20&#xb0; C. to less than 150&#xb0; C. This heating step forms a stable polyhemiaminal (PHA) in solution, which can be cast on a surface of a substrate, thereby forming an initial film layer comprising the PHA. The initial film layer is heated at a temperature of 180&#xb0; C. to about 280&#xb0; C., thereby converting the PHA film layer to a PHT film layer. Young's moduli of about 8 GPA to about 14 GPA have been observed for the PHT film layers.

Methods of preparing polyhemiaminals and polyhexahydrotriazines

A chromium oxide film is formed at room temperature. The chromium oxide film has at least one partially polycrystalline portion and/or at least one amorphous portion depending upon the substrate(s) over which the chromium oxide film is formed. Partially polycrystalline portion(s) of the chromium oxide film are exposed, at room temperature, to an electron beam that has an accelerating voltage of at least 100 kilovolts to further crystallize the partially polycrystalline portion(s). Amorphous portion(s) of the chromium oxide film are exposed, at room temperature, to an electron beam that has an accelerating voltage of more than 100 kilovolts to crystallize the amorphous portion(s).

Hardening chromium oxide films in a magnetic tape head and other structures

A mixed ionic electron conductor (MIEC)-based memory cell access device is provided. The MIEC-based memory cell access device includes a MIEC material portion located between a bottom electrode and a top electrode. A contact area between the MIEC material portion and the bottom electrode is substantially the same as a contact area between the MIEC material portion and the top electrode.

Optimal device structures for back-end-of-line compatible mixed ionic electronic conductors materials

A method and computer product program for determining Young's modulus. The method includes placing a probe in contact with a surface of a material on a substrate and, with an initial force of 800 nano newtons or less; determining the location of the surface relative to an initial indentation depth for the initial force; increasing the force on the probe from the initial force to a maximum force greater than the initial force to generate a load curve; decreasing the force on the probe from the maximum force to the initial force to generate an unload curve, the maximum force selected such that the unload curve is independent of the presence of the substrate; and using the unload curve, determining a relationship between (i) the reduced modulus of the sample material and (ii) the ratio of probe penetration depth and the thickness of the layer.

Determination of young'S modulus of porous thin films using ultra-low load nano-indentation

The present invention relates generally to high current density access devices (ADs), and more particularly, to a structure and method of forming tunable voltage margin access diodes in phase change memory (PCM) blocks using layers of copper-containing mixed ionic-electronic conduction (MIEC) materials. Embodiments of the present invention may use layers MIEC material to form an access device that can supply high current-densities and operate reliably while being fabricated at temperatures that are compatible with standard BEOL processing. By varying the deposition technique and amount of MIEC material used, the voltage margin (i.e. the voltage at which the device turns on and the current is above the noise floor) of the access device may be tuned to specific operating conditions of different memory devices.

Tunable voltage margin access diodes

A device that includes a semiconductor device and a contact electrode with a first side that is opposite a second side. The first side abuts the semiconductor device. The contact electrode has a stoichiometry that varies from the first side to the second side. The stoichiometry of the first side inhibits the diffusion of metal from the semiconductor device into the first contact electrode.

Semiconductor device with a stoichiometric gradient

A crystalline semiconductor Schottky barrier-like diode sandwiched between two conducting electrodes is in series with a memory element, a word line and a bit line, wherein the setup provides voltage margins greater than 1V and current densities greater than 5&#xd7;10A/cm. This Schottky barrier-like diode can be fabricated under conditions compatible with low-temperature BEOL semiconductor processing, can supply high currents at low voltages, exhibits high on-off ratios, and enables large memory arrays.

Low temperature BEOL compatible diode having high voltage margins for use in large arrays of electronic components

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San Jose, CA, United States of America

Kumar R Virwani