Mti Technology Corporation

Micro Technology, Inc.

Netapp, Inc.

Network Appliance, Inc.

Sf2 Corporation

Auspex Systems, Inc.

Emc Corporation

Pmc-sierra Us, Inc.

Candera, Inc.

Kumar Gajjar

Richard Meyer

Larry P Henson

Thomas E Idleman

David T Powers

Chandra Prasad

Chan Y Ng

David H Jaffe

Rahim Ibrahim

Nghiep Tran

Anh Nguyen

Joseph S Glider

Dipam Patel

Jim Collins

Tuan Anh Nguyen

Tamir Ram

Glenn Yu

Paul Lester Popelka

Kaushik S Shah

Ranjit Ghate

Robert S Koontz

Robert Robbins

Duc H Trang

John V Vincenet

Syang Edward Syu

Sara Abraham

Andrey Gusev

Jonathan Flower

Andre Gusev

Richard Meyers

Christopher W Eidler

A storage controller includes data transfer logic defined to enable block level data transfer between the storage controller and multiple types of storage media within a storage volume. The storage controller also includes adaptive logic defined to determine in real-time which of the multiple types of storage media in the storage volume is to be used to store a given data block received by the storage controller. The received data block is stored on a determined storage medium in the storage volume. The data transfer logic and the adaptive logic are defined to maintain a normal interface between the storage controller and an operating system in communication with the storage controller, such that the multiple types of storage media in the storage volume is not apparent to the operating system.

Adaptive intelligent storage controller and associated methods

An automated, policy-based system and method provides information security at various levels in the network, including at the baseline inventory, device, network frame, and command level. This approach improves over the conventional distributed security model by centralizing security in one multi-level management structure. Embodiments of the present invention may also provide a scheme for mapping vendor-unique opcodes to access rights.

Method for device security in a heterogeneous storage network environment

An apparatus and method for testing a network-based storage virtualization system. A tester is connected to a host side of a storage virtualization system. The tester provides test scripts to the storage virtualization system to test I/O and other operations. A separate link, independent of said storage virtualization system, is provided to a storage side of said storage virtualization system to allow verification of the correct translation from virtual to physical independent of the data path used by the virtualization system. Thus, the tester verifies, over the separate link, the physical configuration of VLUNs and data written to the VLUNs by the tester on storage devices.

Auto regression tester for network-based storage virtualization system

A storage virtualization controller for transferring data between a host and a storage device at a wire-speed data transfer rate. A downstream processing element adapted for connection to the storage device is configurable coupled to an upstream processing element adapted for connection to the host. A central processing element coupled to the upstream processing element grants permission to the upstream processing element to transfer the data at the wire-speed rate without further involvement by the central processing element.

High-speed data transfer in a storage virtualization controller

Failover processing in storage server system utilizes policies for managing fault tolerance (FT) and high availability (HA) configurations. The approach encapsulates the knowledge of failover recovery between components within a storage server and between storage server systems. This knowledge includes information about what components are participating in a Failover Set, how they are configured for failover, what is the Fail-Stop policy, and what are the steps to perform when 'failing-over' a component.

Failover processing in a storage system

In a storage server on a storage area network, a media unit manager manages disk space in a manner transparent to the host computers. The media unit manager uses media units corresponding to the physical storage devices on the storage area network to build higher-level media units. The higher level media units can have the attributes of being sliced, concatenated, mirrored, striped, etc. Thus, the host computers need not be aware of the specific physical storage devices themselves, reducing the management and reconfiguration burden on the host computers when storage devices are added to or removed from the storage area network.

Storage virtualization and storage management to provide higher level storage services

A storage provisioning policy is created by specifying storage heuristics for storage attributes using storage heuristic metadata. Storage attributes characterize a storage device and storage heuristic metadata describe how to specify a storage heuristic. Using the storage heuristic metadata, storage heuristics are defined to express a rule or constraint as a function of a storage attribute. In addition, the storage provisioning policy may also specify mapping rules for exporting the storage to a consumer of the storage, such as the server or server cluster.

System and method for policy based storage provisioning and management

Auto regression test for network-based storage virtualization system

The present invention is directed to a novel apparatus for &ldquo;on-the-fly&rdquo; data correction and regeneration of a plurality of data read from and stored to a plurality of storage devices. A control circuit is provided for control of data flow to and from the storage devices. The control circuit establishes and maintains a relatively simple semaphore between itself and an interface circuit controlling a FIFO buffer. A mask register is provided as a type of programmable logic AND gate to assert a master ready signal when each of a selected plurality of the interface circuits, one interface circuit per FIFO buffer, indicates that its respective FIFO buffer is ready, either to output or input an entire block. When each is ready, routing and correction commences under control of the control circuit until an entire block has been processed. Each interface circuit includes an associated flip/flop having an output which provides an indication of the ready status. When the flip/flop is set by the interface circuit, the FIFO buffer is ready. When the control circuit resets the flip/flop, the interface circuit establishes that an entire block has been processed.

Systems and methods for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources

A bridge in a file server provides a direct link to data storage devices in satisfaction of data requests. The file server has one or more function-specific processors, including network processors (NPs) and file storage processors (FSPs), all operating in parallel and communicating over an interconnect bus. Each FSP is also connected to one or more disk controllers which in turn manage one or more data storage devices. To minimize local bus contention between data storage devices and network communications, separate internal buses are provided in the FSP, one internal bus connected to the interconnect bus for network communications and one internal bus connected to disk controllers for performing I/O operations on data storage devices. The bridge provides a path between the FSP's internal buses so that, for disk access requests, data from a particular data storage device may be sent by the disk controller via the bridge over the interconnect bus to the NP servicing the request with minimal involvement of the local FSP processor.

Bridge for direct data storage device access

The present invention is directed to a novel apparatus for 'on-the-fly' data correction and regeneration of a plurality of data read from and stored to a plurality of storage devices. A control circuit is provided for control of data flow to and from the storage devices. The control circuit establishes and maintains a relatively simple semaphore between itself and an interface circuit controlling a FIFO buffer. A mask register is provided as a type of programmable logic AND gate to assert a master ready signal when each of a selected plurality of the interface circuits, one interface circuit per FIFO buffer, indicates that its respective FIFO buffer is ready, either to output or input an entire block. When each is ready, routing and correction commences under control of the control circuit until an entire block has been processed. Each interface circuit includes an associated flip/flop having an output which provides an indication of the ready status. When the flip/flop is set by the interface circuit, the FIFO buffer is ready. When the control circuit resets the flip/flop, the interface circuit establishes that an entire block has been processed.

System and method for dynamic alignment of associated portions of a code

Growing community of inventors

San Jose, CA, United States of America

Kumar Gajjar