Vixs Systems, Inc.

Ati International Srl

Ati Technologies Ulc

Kuldip Sahdra

Gordon Caruk

Lewis Leung

Norman Stewart

Shijun D Huang

Mang Lun A Tong

Michael G Frank

David I J Glen

Grigori Temkine

Oleg Drapkin

Paul D Ducharme

Antonio Asaro

Brian Hiyin Lee

Aris Balatsos

Norman Vernon Douglas Stewart

Peter L Rosefield

Chak Cheung Ho

Sasa Marinkovic

Arkadi Avrukin

James B Fry

Krzysztof Socha

Jamil Ahmed

Roche Thambimuthu

A universal serial bus (USB) dongle device includes a USB interface for receiving a video signal in a first format and for sending a processed video signal in a second format wherein the first format differs from the second format. An encoding module generates the processed video signal based on the video signal. In a further embodiment, A video card includes a video receiver for receiving a video signal in a first format, based on a selection command. An encoding module generates a processed video signal in a second format based on the video signal, wherein the first format differs from the second format. A USB interface transfers the processed video signal to the host device, receives the selection command from the host device and receives a power signal from the host device to power the video receiver and the encoding module.

Dongle device with video encoding and methods for use therewith

A content access device includes an interface module that receives a transport stream and outputs a processed transport stream. An input buffer buffers the received transport stream. A polling processor processes the transport stream based on the at least one key to generate the processed transport stream, wherein the polling processor operates to descramble individual packets of the transport stream in a plurality of polling slots of a polling loop. An output buffer buffers the processed transport stream for output by the interface module.

Content access device with polling processor and methods for use therewith

A universal serial bus (USB) dongle device includes a USB interface that receives selection data from a host device that indicates a selection of a first video format from a plurality of available formats. The USB interface also receives an input video signal from the host device in the first video format and a power signal from the host device. An encoding module generates a processed video signal in a second video format based on the input video signal, wherein the first video format differs from the second video format. The USB interface transfers the processed video signal to the host device.

A configurable register method and structure included configuration logic to form a register value. A data bridge system, for connecting an interface of a computer system to a plurality of application-specific integrated circuits (ASIC), has a data bridge operatively coupled between the computer interface and the plurality of ASICs that employs the configurable registers. The data bridge has a read only memory for storing at least the initial values and mask values for each ASIC of the plurality of ASICs. The data bridge upon initialization forms base address registers and other configuration data that are queried by the computer system. When the ASICs are graphic processors, the initial values and the mask values stored in the read only memory define the base address registers in the data bridge as a function of the configuration requirements of the graphic processors. The base address registers are thus programmable as a function of the initial values and mask values in the read only memory. The read only memory is coupled to the data bridge.

Method and apparatus for a data bridge in a computer system

USB video card and dongle device with video encoding and methods for use therewith

A configurable bus interface circuit includes an internal bus bridge and an internal circuit. The configurable bus interface circuit also includes an internal I/O circuit couplable to an external circuit, via the internal bus bridge. The configurable bus interface circuit electrically isolates the internal circuit to avoid the propagation of signals between the internal I/O circuit and the external circuit.

Method and apparatus for configuring an integrated bus

A method and apparatus for supporting multiple bus masters on an AGP bus is presented. A first bus master is configured as an AGP bus master and utilizes the AGP request portion of the AGP bus structure to issue bus master requests. A second bus master is configured as a PCI bus master and utilizes the PCI bus master request portion of the AGP bus to assert bus master requests. When bus master grants are received via the AGP bus, status lines are used to determine the character of the bus master grant. When the status lines indicate that the bus master grant is an AGP bus master grant, the AGP bus master performs AGP bus master operations. When the status lines indicate that the bus master grant is a PCI bus master grant, the PCI bus master is enabled and allowed to perform PCI bus mastering operations.

Method and apparatus for supporting multiple bus masters with the accelerated graphics protocol (AGP) bus

An impedance compensation circuit and method for an input/output buffer provides dynamic impedance compensation by using programmable impedance arrays and a dynamically adjustable on-chip load. Accordingly, among other advantages, only a single off-chip or external calibrated impedance resistor is used and only a single test pad is necessary.

Dynamic impedance compensation circuit and method

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Richmond Hill, Canada

Kuldip Sahdra