Other

Skhynix Inc.

Lg Semicon Co., Ltd.

Korea Information & Communication Co., Ltd.

Kuk Jin Chun

Jong Hoon Kim

Woong Il Choi

Byung Gook Park

Jong Duk Lee

Byoung Do Lee

Jae Hyun Son

Jeong Ho Lyu

Seok Ho Kang

The disclosure relates to a semiconductor chip and a stacked type semiconductor package having the same. The semiconductor chip includes: a semiconductor chip body having a first surface formed with a plurality of bonding pads and a second surface which is opposite to the first surface, a plurality of first and second through electrodes that pass through the semiconductor chip body and one ends thereof are electrically connected to the bonding pads, an insulating layer formed over the second surface of the semiconductor chip body such that the other ends of the first and second through electrodes are not covered by the insulating layer, and a first heat spreading layer formed over the insulating layer.

Semiconductor chip and stacked type semiconductor package having the same

A field emission device includes a field emission cathode electrode having a cusp, a first insulating layer on the field emission cathode electrode excluding a portion over the cusp, a first electrode on the first insulating layer, a second insulating layer on the first electrode, a second electrode on the second insulating layer, a third insulating layer on the second electrode, and a silicon substrate on the third insulating layer. A method of fabricating a field emission device having a semiconductor substrate includes the steps of sequentially forming first and second insulating layers on first and second surfaces of the substrate, removing the first and the second insulating layers from the first surface of the substrate, forming a third insulating layer and a first metallic layer on the first surface of the substrate, selectively removing the first insulating layer and the second insulating layer on the second surface of the semiconductor substrate to expose the substrate, forming a fourth insulating layer and a second metallic layer on the first metallic layer, forming a hole trench to expose the third insulating layer, forming a fifth insulating layer over an exposed front surface including the hole trench, forming a third metallic layer on the fifth insulating layer, anisotropically etching the silicon substrate from the second surface to expose the fifth insulating layer through the hole trench, and removing the fifth insulating layer in the hole trench.

Field emission device and method of fabricating the same

The present invention privides a method for manufacturing an ISRC MOSFET, comprising steps of forming an isolating layer through the LOCOS process, depositing a mask oxide layer, exposing only the part of silicon substrate for forming the channel and shallow junction of source/drain layers, depositing the first nitride layer over the resultant substrate, dry-etching the first nitride layer to form a nitride side-wall, forming an oxide layer being recessed into the channel, wet-etching the nitride side-wall, forming two doped layers for the shallow source/drain by an N.sup.+ or P.sup.+ ion-implantation, depositing the second nitride layer, dry-etching for forming a nitride side-wall, forming a P.sup.- or N.sup.- doped layer between the two doped layers, forming a gate oxide layer on the P.sup.- or N.sup.- doped layer, depositing a poly-silicon layer, forming a poly-silicon gate by a llithography process and a dry-etching process, etching away the mask oxide layer, and ion-implanting for thick source/drain junction.

Method for manufacturing ISRC MOSFET

Growing community of inventors

Seoul, South Korea

Kuk Jin Chun