Samsung Electronics Co., Ltd.

Kuihan Ko

Sang-Wan Nam

Kitae Park

Jaeyong Jeong

Wontaeck Jung

Yang-Lo Ahn

Bohchang Kim

Bongsoon Lim

Jin-Young Kim

Junho Choi

Sangwon Park

Jooyong Park

Minyong Kim

Sang-won Park

Won-taeck Jung

Han Il Park

Jekyung Choi

Heewon Son

A memory device includes a memory cell array, a reference generating circuit, a row decoding circuit that is connected to the memory cell array through word lines, a page buffer circuit that is connected to the memory cell array through bit lines, a data input/output circuit that is connected to the page buffer circuit through a data line, a buffer circuit, a control logic circuit that performs logic sequences, based on the internal clock signal and the internal power, and a test mode circuit. When the memory device enters a test mode, the test mode circuit disables a part of components of the reference generating circuit. In the test mode, the control logic circuit performs the logic sequences by using an external clock signal provided from an external device.

Memory device, operation method of memory device, and operation method of test device configured to test memory device

A memory system includes a first memory device including a plurality of first memory blocks each including a plurality of first memory cells stacked in a direction perpendicular to a substrate; and a memory controller configured to control a memory operation of the first memory device. The memory controller is configured to select and operate any one of different control schemes for each of the first memory blocks based on a number of first not-open (N/O) strings included in each of the first memory blocks, respectively.

Memory device, memory controller, and memory system including the same

A memory device including: a memory cell array including a plurality of memory cells forming a plurality of strings in a vertical direction with a substrate; and a control logic configured to detect a not-open string (N/O string) from the plurality of strings in response to a write command and convert pieces of target data to be programmed on a plurality of target memory cells in the N/O string so that the pieces of target data have a value that limits a number of times a program voltage is applied to the plurality of target memory cells.

Method of detecting a not-open string (N/O string), converting target data, with a value that matches inhibit data, to be programmed to target memory cells in the N/O string, and programming the memory cells

A non-volatile memory device is provided. The memory device includes: word lines stacked on a substrate; a string select lines on the word lines, the string select lines being spaced apart from each other in a first horizontal direction and extending in a second horizontal direction; and a memory cell array including memory blocks, each of which includes memory cells connected to the word lines and the string select lines. The string select lines include a first string select line, and a second string select line which is farther from a word line cut region than the first string select line, and a program operation performed on second memory cells connected to a selected word line and the second string select line is performed before a program operation performed on first memory cells connected to the selected word line and the first string select line.

Non-volatile memory device

A storage device includes a nonvolatile memory device that includes memory blocks, each including memory cells, and a controller that receives a first write request from an external host device. Depending on the first write request, the controller transmits a first sanitize command to the nonvolatile memory device and transmits first write data and a first write command associated with the first write request to the nonvolatile memory device. The nonvolatile memory device is configured to sanitize first data previously written to first memory cells of a first memory block of the memory blocks in response to the first sanitize command. The nonvolatile memory device is further configured to write the first write data to second memory cells of the first memory block in response to the first write command.

Storage device including nonvolatile memory device and controller

A driving method of a nonvolatile memory device includes receiving a program command and an address. The method includes changing a number of adjacent zones of a plurality of zones formed of unselected word lines according to a location of a selected word line corresponding to the received address. The method further includes applying different zone voltages to the number of adjacent zones and remaining zones. The nonvolatile memory device includes a plurality of strings formed to penetrate word lines stacked on a substrate in a plate shape.

Memory system and driving method thereof using at least two zone voltages

Memory system and driving method thereof

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Seoul, South Korea

Kuihan Ko