Csmc Technologies Fab2 Co., Ltd.

Southeast University

China Resources Microelectronics (chongqing) Co., Ltd.

Kui Xiao

Weifeng Sun

Siyang Liu

Longxing Shi

Dejin Wang

Jiaxing Wei

Shengli Lu

Sheng Li

Zheng Bian

Chi Zhang

Guipeng Sun

Feng Lin

Dong Fang

Li Lu

Jinjie Hu

Ningbo Li

Xinyi Tao

Qichao Wang

Ling Yang

Ran Ye

Rongcheng Lou

A heterojunction semiconductor device with a low on-resistance includes a metal drain electrode, a substrate, and a buffer layer. A current blocking layer is arranged in the buffer layer, a gate structure is arranged on the buffer layer, and the gate structure comprises a metal gate electrode, GaN pillars and AlGaN layers, wherein a metal source electrode is arranged above the metal gate electrode; and the current blocking layer comprises multiple levels of current blocking layers, the centers of symmetry of the layers are collinear, and annular inner openings of the current blocking layers at all levels gradually become smaller from top to bottom. The AlGaN layers and the GaN pillars are distributed in a honeycomb above the buffer layer.

Heterojunction semiconductor device with low on-resistance

A power semiconductor device includes: a substrate; drain metal; a drift region; a base region; a gate structure; a first conductive type doped region contacting the base region on the side of the base region distant from the gate structure; a source region provided in the base region and between the first conductive type doped region and the gate structure; contact metal that is provided on the first conductive type doped region and forms a contact barrier having rectifying characteristics together with the first conductive type doped region below; and source metal wrapping the contact metal and contacting the source region.

Power semiconductor device and manufacturing method therefor

A lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS), including: a trench gate including a lower part inside a trench and an upper part outside the trench, a length of the lower part in a width direction of a conducting channel being less than that of the upper part, and the lower part extending into a body region and having a depth less than that of the body region; an insulation structure arranged between a drain region and the trench gate and extending downwards into a drift region, a depth of the insulation structure being less than that of the drift region.

Lateral double-diffused metal oxide semiconductor field effect transistor

A semiconductor device comprises a drift region (), a body region (), a first doped region () and a second doped region ()); a first trench penetrates the first doped region (), the body region () extends into the drift region (); an extension region () having an opposite conductivity type to the drift region () and surrounding the bottom wall of the first trench; where the first trench is filled with a first conductive structure () and a second conductive structure (); a dielectric layer () formed between the second conductive structure () and the inner wall of the first trench, as well as between the first conductive structure () and the inner wall of the first trench; a second trench penetrating the first doped region () and the body region (), and a dielectric layer () located between the third conductive structure () and the second trench ().

Semiconductor device and preparation method thereof

A preparation method for semiconductor device, comprising: forming a body region () in the drift region (), forming a first doped region () and a second doped region () in the body region (); forming a first trench () penetrating the first doped region () and the body region () and extending to the drift region (); forming an extension region () with a conductivity type opposite to that of the drift region () and surrounding the bottom wall of the first trench (); filling the first trench () with a dielectric layer () formed on the sidewall of the trench, a first conductive structure () located at the bottom of the trench and a second conductive structure () located at the top of the trench; forming a second trench () penetrating the body region () and extending into the drift region (); filling the second trench () with a third conductive structure () and a dielectric layer () formed on the inner wall of the trench. The second conductive structure () is electrically connected with the gate, and the first doped region (), the second doped region (), and the third conductive structure () are electrically connected with the first electrode ().

Semiconductor device and preparation method therefor

A gallium nitride power device, including: a gallium nitride substrate; cathodes; a plurality of gallium nitride protruding structures arranged on the gallium nitride substrate and between the cathodes, a groove is formed between adjacent gallium nitride protruding structures; an electron transport layer, covering a top portion and side surfaces of each of the gallium nitride protruding structures; a gallium nitride layer, arranged on the electron transport layer and filling each of the grooves; a plurality of second conductivity type regions, where each of the second conductivity type regions extends downward from a top portion of the gallium nitride layer into one of the grooves, and the top portion of each of the gallium nitride protruding structures is higher than a bottom portion of each of the second conductivity type regions; and an anode, arranged on the gallium nitride layer and the second conductivity type regions.

Gallium nitride power device and manufacturing method thereof

Disclosed is a semiconductor device having an electrostatic discharge protection structure. The electrostatic discharge protection structure is a diode connected between a gate electrode and a source electrode of the semiconductor device. The diode comprises a diode body and two connection portions connected to two ends of the diode body and respectively used for electrically connecting to the gate electrode and the source electrode. Lower parts of the two connection portions are respectively provided with a trench. An insulation layer is provided on an inner surface of the trench and the surface of a substrate between trenches. The diode body is provided on the insulation layer on the surface of the substrate. The connection portions respectively extend downwards into respective trenches from one end of the diode body. A dielectric layer is provided on the diode, and a metal conductor layer is provided on the dielectric layer.

Semiconductor device having electrostatic discharge protection structure with a trench under a connecting portion of a diode

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Jiangsu, China

Kui Xiao