Au Optronics Corporation

Kuei-Sheng Tseng

Chu-Yu Liu

Lee-Hsun Chang

Ming-Chang Shih

Shyh-Feng Chen

Po-Jen Chiang

Tung-Chang Tsai

Chung-Jen Cheng Chiang

Hsiang-Pin Fan

Jing-Ru Chen

I-Chun Chen

Chung-Jen Chengchiang

Ming-Sheng Lai

Wen-Pin Chen

Chen-Yi Wu

Shih-Chyn Lin

Tsung-Cheng Lin

Shyh-feng Chen

Wen-Bin Chen

Chun-Jong Chang

Chao-Chin Wu

Bo-Ren Jiang

Chung-Jen Chen Chiang

Hsin-Kai Huang

A liquid crystal display panel and liquid crystal display array substrate are disclosed. The liquid crystal display array substrate includes first scan lines, second scan lines, data lines, first columns of pixel units and second columns of the pixel units. Each of the first columns of the pixel units has a plurality of first pixel structures electrically connected to the first scan lines and the data lines respectively. Each of the second columns of the pixel units has a plurality of second pixel structures electrically connected to the second scan lines and the data lines respectively. Each of the first pixel structures has a first storage capacitor, and the first storage capacitor has a first capacitance value. Each of the second pixel structures has a second storage capacitor, and the second storage capacitor has a second capacitance value, wherein the second capacitance value is less than the first capacitance value.

Liquid crystal display panel and liquid crystal display array substrate

A liquid crystal display panel and liquid crystal display array substrate are disclosed herein. The liquid crystal display array substrate includes scan lines, data lines, first rows of pixel units, and second rows of pixel units. The first rows of pixel units and the second rows of pixel units are arranged alternately. Each of the first rows of pixel units has first pixel structures disposed in a row direction and electrically connected to the scan lines and the data lines, respectively. Each of the second rows of pixel units has second pixel structures disposed along the row direction and electrically connected to the scan lines and the data lines, respectively. The first capacitance value of the first storage capacitor of each first pixel structure is greater than the second capacitance value of the second storage capacitor of each second pixel structure.

An integrated touch panel has a display pixels arranged in a two-dimensional array of rows and columns connected to a plurality of gate lines and data lines. Each gate line receives a gate line signal for controlling the pixels in a row, and each data lines provides display data to the pixels in a column. The touch panel is connected to a sensing module having a plurality of shift registers connected in series. The touch panel has a plurality of sensor units arranged in sensor rows and sensor columns. Each sensor row receives gate line signals from a gate line, and each sensor column is connected to a sensor signal line for providing a touch signal to a shift register in the sensing module such that the shift registers connected to two adjacent sensor signal lines are separated by a different shift register is the series.

Integrated touch panel and method for making same

A gate driver on array of a display includes a substrate having a peripheral region, and a gate driver on array structure formed in the peripheral region. The gate driver on array structure includes a pull-down transistor, and the pull-down transistor has a gate electrode, an insulating layer, a semiconductor island, a source electrode, and a drain electrode. The semiconductor island extends out of both edges of the gate electrode, and extends out of an edge of the source electrode and an edge of the drain electrode.

Gate driver on array of a display

An active device array substrate includes a substrate, a pixel array, a peripheral circuit, and a number of marks. The substrate has an active area and a peripheral circuit area that is connected to the active area. The pixel array is disposed on the active area of the substrate. The peripheral circuit is disposed on the peripheral circuit area of the substrate. Besides, the peripheral circuit includes a number of driver bonding pads, a number of fan-out lines, and a number of connecting lines. The fan-out lines are electrically connected to the pixel array. Each of the connecting lines connects one of the driver bonding pads and one of the fan-out lines. Additionally, the connecting lines are arranged in different pitches. Each of the marks is disposed between two adjacent connecting lines.

Active device array substrate with plurality of marks in a peripheral area and liquid crystal display panel

An array substrate for a liquid crystal display (LCD) device. An exemplary embodiment of an array substrate comprises a transparent substrate. A plurality of first and second conductive lines overlies the transparent substrate and cross over each other, thereby defining a plurality of display regions. At least one first spacer overlies a portion of the first or second conductive lines, wherein the first spacer is not formed over an intersection of the first and second conductive lines. A pixel electrode layer overlies the display regions, wherein the first spacer partially covers the pixel electrode layer.

Array substrate for LCD device

A shift register includes a control circuit, a pull-up circuit and a pull-down circuit. The control circuit generates a control signal according to a start pulse signal during being enabled. The pull-up circuit produces a gate pulse signal according to a clock signal during being enabled by the control signal. The pull-up circuit includes a dual-gate transistor. A first gate of the dual-gate transistor is electrically coupled to the control signal, a second gate of the dual-gate transistor is electrically coupled to a predetermined voltage, the source/drain of the dual-gate transistor serves as an output terminal for the gate pulse signal, and the drain/source of the dual-gate transistor is electrically coupled to the clock signal. The pull-down circuit pulls a potential at the first gate and another potential at the output terminal down to a power supply potential during the pull-up circuit is disabled.

Shift register

In a method of making device of a display, an insulating layer, a semiconductor layer, an ohmic contact layer, a second conductive layer, and a photoresist pattern are consecutively formed on a first conductive structure. The photoresist pattern includes a first thickness region, and a second thickness region outside the first thickness region. The thickness of the second thickness region is smaller than that of the first thickness region. In addition, in a gate driver on array (GOA) of a display, it includes a gate driver on array structure with a pull-down transistor. The pull-down transistor has a gate electrode, a semiconductor island, a source electrode and a drain electrode. The semiconductor island extends out of the edges of the gate electrode, the source electrode, and the drain electrode.

Method of making device of a display

An LCD panel including a first substrate, a second substrate, a black matrix, a liquid crystal (LC) layer, first photo spacers and second photo spacers is provided. The first and the second substrates are substantially parallel. The LC layer is disposed between the first and the second substrates. The black matrix disposed on the first substrate surrounds display regions and defines a non-display region. The first photo spacers contact the second substrate and are disposed on the black matrix. The second photo spacers are disposed on the black matrix. Channels are formed between the second photo spacers, such that LC molecules of the LC layer flow between the display regions through the channels. The width of the channels between any two of the adjacent second photo spacers substantially ranges from 2&#x2dc;10 &#x3bc;m. The dimension of the first photo spacers is substantially greater than that of the second photo spacers.

Liquid crystal display panel and manufacturing method thereof

A liquid crystal display includes a gate driver, a source driver, a plurality of scan lines, a plurality of data lines, and a plurality of pixel units arranged in an array. The gate driver is used for generating scan signals. The scan signals include a first voltage level, a second voltage level greater than the first voltage level, and a third voltage level less than the first voltage level. The source driver is used for generating data signals. The plurality of scan lines includes a first scan line, a second scan line, and a third scan line, for delivering the scan signals. The plurality of data lines includes a first data line for delivering the data signals. Each pixel unit includes a first pixel electrode, a first transistor, a second pixel electrode, a second transistor, and a level adjustment unit.

Liquid crystal display capable of compensating feed-through voltage and driving method thereof

A liquid crystal display panel includes a first scan line, a second scan line, a data line, a first pixel and a second pixel. The first pixel has a first switch, a second switch and a first pixel electrode. The second pixel has a third switch and a second pixel electrode. The driving method of the liquid crystal display panel includes the following steps. During a first time period, the first scan line and the second scan line are enabled at the same time, and a first pixel voltage is inputted to the data line. During a second time period, the first scan line is enabled, the second scan line is disabled, and a second pixel voltage is inputted to the data line. The second time period is shorter than the first time period.

Method of driving liquid crystal display panel

A pixel driving method applied to a flat panel display is provided. In a first time period, an Nth scan line provides a first scan voltage to a pixel row to conduct the corresponding thin film transistors (TFT). Also, an N+1th scan line provides a second scan voltage through the conducted TFTs to the corresponding first switches to conduct the first switches, and then a number of first data voltages of the corresponding data lines are outputted to the corresponding first pixel electrodes. The absolute value of the difference between the first scan voltage and the second scan voltage is not smaller than a threshold voltage of each TFTs.

Flat panel display and pixel driving method applied thereto

A display panel includes lower and upper glass substrates. The lower glass substrate includes a pixel array having a plurality of pixel units formed thereon, wherein each pixel unit includes a transparent domain and an opaque domain surrounding the transparent domain, and an upward projection is formed in the opaque domain on the lower glass substrate. The upper glass substrate, mounted on the lower glass substrate, has a spacer formed therebeneath and protruded downwardly therefrom for keeping a cell gap between the upper and lower glass substrates, wherein the spacer is fallen in the opaque domain and has a lateral side in collision with the projection on the lower glass substrate to prevent relative displacement between the lower and upper glass substrates.

Flat display panel with a spacer unit to prevent displacement between upper and lower glass substrates

A display device includes a display panel, a driving circuit and a repair line. The display panel has a display region and a peripheral circuit region adjacent to the display region. The peripheral circuit region has a driving circuit bonding region and a plurality of conductive wires extending from the display region into the driving circuit bonding region. The driving circuit is electrically connected to the display region through the driving circuit bonding region and the conductive wires. The repair line is distributed in the peripheral circuit region and the driving circuit, wherein the repair line has a repair portion located between the driving circuit bonding region and the display region. As described above, the repair process of the display device provided by the present invention is simpler so as to save the cost and time of the successive processes.

Growing community of inventors

Hsin-Chu, Taiwan

Kuei-Sheng Tseng