Vishay General Semiconductor, Inc.

General Semiconductor of Taiwan, Ltd.

General Semiconductor Taiwan, Ltd.

Kuang Hann Lin

Chih-Ping Peng

Wan-Lan Chiang

Max Sk Chen

Ching Lu Hsu

Yan-Man Tsui

A semiconductor assembly includes a first subassembly comprising a heat sink and a first patterned polymer layer disposed on a surface of the heat sink to define an exposed portion of the first surface. The exposed portion of the first surface extends radially inward along the heat sink surface from the first layer. The subassembly also includes a second patterned polymer layer disposed on a radially outer portion of the first patterned polymer layer. The first and second layers define a cell for accommodating a power semiconductor die. Solder material is disposed on the exposed portion of the heat sink surface and in the cell. A power semiconductor die is located within the cell on a radially inward portion of the first layer and thermally coupled to the heat sink by the solder material.

Semiconductor assembly that includes a power semiconductor die located on a cell defined by first and second patterned polymer layers

The semiconductor assembly includes a first subassembly having a heat sink. Solder material is disposed on the exposed portion of a first surface of heat sink. A power semiconductor die is located on the first surface of the heat sink and is thermally coupled thereto by the solder material. A packaging patterned polymer layer is disposed on a second surface of the heat sink opposing the first surface and defines an interior surface portion of the heat sink. A semiconductor package is provided in which the first subassembly, solder material and die are located such that the interior surface portion of the second surface of the heat sink is not enclosed by the semiconductor package.

Subassembly that includes a power semiconductor die and a heat sink having an exposed surface portion thereof

Semiconductor assembly that includes a power semiconductor die located in a cell defined by a patterned polymer layer

The present invention provides a semiconductor device packaging assembly and method for manufacturing the assembly. Preferably, the method of the present invention is used to assemble a plurality of semiconductor chips, such that the throughput of assembly can be enhanced. The method comprises the steps of: providing a bottom frame matrix including a plurality of bottom frame units, each of which unit comprises a bottom supporting portion and a bottom frame portion; providing a bridge frame including a plurality of bridge frame units, each of which unit comprises a bridge frame portion and a plurality of conducting bars; placing each of the semiconductor chips on each of the bottom supporting portions, respectively; and bonding each bottom frame unit and each bridge frame unit together, wherein, the conducting bars extending from each bridge frame portion toward corresponding chips are electrically coupled to bonding areas of the corresponding chips.

Method for assembling a semiconductor chip utilizing conducting bars rather than bonding wires

The present invention provides a semiconductor device packaging assembly and method for manufacturing the assembly. Preferably, the method of the present invention is used to assemble a plurality of semiconductor chips, such that the throughput of assembly can be enhanced, by providing a bottom frame matrix including a plurality of bottom frame units, each of which unit includes a bottom supporting portion and a bottom frame portion; providing a bridge frame including a plurality of bridge frame units, each of which unit includes a bridge frame portion and a plurality of conducting bars; placing each of the semiconductor chips on each of the bottom supporting portions, respectively; and bonding each bottom frame unit and each bridge frame unit together, wherein, the conducting bars extending from each bridge frame portion toward corresponding chips are electrically coupled to bonding areas of the corresponding chips.

Growing community of inventors

Taipei, Taiwan

Kuang Hann Lin