Taiwan Semiconductor Manufacturing Comp. Ltd.

Kuan-Kan Hu

Shuen-Shin Liang

Sung-Li Wang

Wei-Yen Woon

Chuan-Hui Shen

Chia-Hung Chu

Hsu-Kai Chang

Po-Chin Chang

Szuya Liao

Pinyen Lin

Jhih-Rong Huang

Yuting Cheng

Chi On Chui

Lin-Yu Huang

Liang-Yin Chen

Ku-Feng Yang

Chia-Cheng Chen

Cheng-Wei Chang

Chun-Hung Wu

Ken-Yu Chang

Han-Yu Lin

Yi-Bo Liao

Wei-Yip Loh

Hung-Yi Huang

Hong-Mao Lee

Yan-Ming Tsai

Yi-Ying Liu

Chen-Fong Tsai

Han-De Chen

Kenichi Sano

Tsun-Jen Chan

Kao-Feng Lin

Cheng-Wei Lian

Szu-Hua Chen

Tzu-Pei Chen

Harry Chien

Sung-li Wang

Po-Cheng Wang

Hung Pin Lu

Che Chi Shih

Tsung-Kai Chiu

Min-Chiang Chuang

Szu-Hsian Lee

A method is provided that includes depositing a catalyst layer along a surface of the opening and performing a selectivity enhancement process. The selectivity enhancement process alters a deposition rate of a metal component on at least one region of the catalyst layer. The metal component is deposited on the catalyst layer. Exemplary selectivity enhancement processes include a self-assembled monolayer (SAM), introducing an accelerator, and/or introducing a suppressor.

Metal features of a semiconductor device and methods for forming the same

A semiconductor device includes a source/drain portion, a metal silicide layer disposed over the source/drain portion, and a transition layer disposed between the source/drain portion and the metal silicide layer. The transition layer includes implantation elements, and an atomic concentration of the implantation elements in the transition layer is higher than that in each of the source/drain portion and the metal silicide layer so as to reduce a contact resistance between the source/drain portion and the metal silicide layer. Methods for manufacturing the semiconductor device are also disclosed.

Semiconductor device and method for manufacturing the same

A semiconductor device includes a semiconductor substrate, an epitaxial structure, a silicide structure, a conductive structure, and a protection segment. The epitaxial structure is disposed in the semiconductor substrate. The silicide structure is disposed in the epitaxial structure. The conductive structure is disposed over the silicide structure and is electrically connected to the silicide structure. The protection segment is made of metal nitride, is disposed over the silicide structure, and is disposed between the silicide structure and the conductive structure.

Semiconductor device with conductive liners over silicide structures and method of making the semiconductor device

A method for manufacturing a semiconductor device is provided. The method includes forming a first transistor over a substrate, wherein the first transistor comprises a first source/drain feature; depositing an interlayer dielectric layer around the first transistor; etching an opening in the interlayer dielectric layer to expose the first source/drain feature; conformably depositing a semimetal layer over the interlayer dielectric layer, wherein the semimetal layer has a first portion in the opening in the interlayer dielectric layer and a second portion over a top surface of the interlayer dielectric layer; and forming a source/drain contact in the opening in the interlayer dielectric layer.

Semiconductor device and manufacturing method thereof

A titanium precursor is used to selectively form a titanium silicide (TiSi) layer in a semiconductor device. A plasma-based deposition operation is performed in which the titanium precursor is provided into an opening, and a reactant gas and a plasma are used to cause silicon to diffuse to a top surface of a transistor structure. The diffusion of silicon results in the formation of a silicon-rich surface of the transistor structure, which increases the selectivity of the titanium silicide formation relative to other materials of the semiconductor device. The titanium precursor reacts with the silicon-rich surface to form the titanium silicide layer. The selective titanium silicide layer formation results in the formation of a titanium silicon nitride (TiSiN) on the sidewalls in the opening, which enables a conductive structure such as a metal source/drain contact to be formed in the opening without the addition of another barrier layer.

Conductive structures and methods of formation

Bonding and isolation techniques for stacked device structures are disclosed herein. An exemplary method includes forming a first insulation layer on a first device component, forming a second insulation layer on a second device component, and bonding the first insulation layer and the second insulation layer. The bonding provides a stacked structure that includes the first device component over the second device component, and an isolation structure (formed by the first insulation layer bonded to the second insulation layer) therebetween. The isolation structure includes a first portion having a first composition and a second portion having a second composition different than the first composition. The method further includes processing the stacked structure to form a first device disposed over a second device, where the isolation structure separates the first device and the second device. The first insulation layer and the second insulation layer may include the same or different materials.

Bonding and isolation techniques for stacked transistor structures

The present disclosure describes a semiconductor device with a rare earth metal oxide layer and a method for forming the same. The method includes forming fin structures on a substrate and forming superlattice structures on the fin structures, where each of the superlattice structures includes a first-type nanostructured layer and a second-type nanostructured layer. The method further includes forming an isolation layer between the superlattice structures, implanting a rare earth metal into a top portion of the isolation layer to form a rare earth metal oxide layer, and forming a polysilicon structure over the superlattice structures. The method further includes etching portions of the superlattice structures adjacent to the polysilicon structure to form a source/drain (S/D) opening and forming an S/D region in the S/D opening.

Semiconductor devices with a rare earth metal oxide layer

Growing community of inventors

Hsinchu, Taiwan

Kuan-Kan Hu