Taiwan Semiconductor Manufacturing Comp. Ltd.

United Microelectronics Corp.

Kuan-Hua Su

Yi-Lin Chuang

Szu-Ju Huang

Shou-Wan Huang

Chih-Tien Chang

A method for timing optimization is disclosed. The method includes obtaining information on detour locations of a chip by performing a routing operation, establishing, through machine learning, a model that describes a relationship between an image map and the detour locations, generating predicted detour locations based on the model and the image map, determining the probability of detouring in a region of the predicted detour locations, determining a predicted detour net for a path in a region having a high probability of detour, and determining sensitivity of the path.

Method and system for timing optimization with detour prediction

A photoresist coating process including a first step and a second step is provided. In the first step, a wafer is accelerated by a first average acceleration. In the second step, the wafer is accelerated by a second average acceleration. The first acceleration and the second acceleration are both larger than zero, and photoresist material is provided to the wafer only in the second step.

Growing community of inventors

Hsinchu, Taiwan

Kuan-Hua Su