International Business Machines Corporation

Kuan Feng

Sheng Xu

Junfeng Liu

Liang Chen

Rong Yan

Yu Fen Yuan

Huo Ding Li

Khalid Ahmed

Zhichao Su

Xing Liu

Hui Gu

Shu Qing Yang

Jun W Zhang

Xiao Ming Bao

Yao Ma

Hai Long W Wen

Xing S H Liu

Todd Eric Kaplinger

Jun Wei Zhang

Fan Jing Meng

Yi Zhao

Min Zhu

Yonghua Lin

Tamar Eilam

Paolo Dettori

Ali Kanso

Wenjun Wang

Qing Xu

Alexey Roytman

Heng Xu

Ting Xue

King Shing K Lui

Zheng Wang

Hao Chen Gui

Su Lei

Jun Feng Liu

Wang Zheng

Embodiments for efficient machine and deep learning hyperparameter tuning in a distributed computing system. Runtime metrics of each training iteration are collected to identify candidate jobs to merge during an execution phase. The candidate jobs are grouped into job groups, and the job groups containing the candidate jobs are merged together subsequent to each iteration boundary for execution during the execution phase.

Job merging for machine and deep learning hyperparameter tuning

Systems, computer-implemented methods, and computer program products that can facilitate generating and applying meta-policies for application deployment environments are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a state analyzer that can analyze a first application deployment environment to identify a first configuration of the first application deployment environment. The computer executable components can further comprise a policy generator that generates a meta-policy based on the identified first configuration.

Generation and application of meta-policies for application deployment environments

Embodiments for accelerator allocation and reclamation for deep learning jobs in a computing cluster. Metrics are recorded of each accelerator of a set of accelerators allocated to a deep learning job including computing a gain of computational power by an additional allocation of new accelerators and computing a cost of transferring data among the new accelerators and the set of allocated accelerators. Ones of the new accelerators are allocated to the deep learning job or ones of the set of allocated accelerators assigned to perform the deep learning job are reclaimed upon determining an optimal accelerator topology by comparing the gain of computation power and the cost of transferring data.

Smart accelerator allocation and reclamation for deep learning jobs in a computing cluster

A distributed storage system places data in a time-based manner. The distributed storage system comprises a plurality of storage nodes for storing user data, and each user in at least one user is assigned a storage node sub-set for storing user data thereof. The distributed storage system monitors and records user accesses on storage nodes. The distributed storage system calculates a time-based access pattern of a user and time-based access patterns of the storage nodes outside the storage node sub-set of the user in the distributed storage system according to recorded user accesses. The distributed storage system adjusts the storage node sub-set of the user according to the time-based access pattern of the user and the time-based access patterns of the storage nodes outside the storage node sub-set of the user in the distributed storage system.

Time-based data placement in a distributed storage system

Embodiments for dynamic accelerator scheduling and grouping for deep learning jobs in a computing cluster. An efficiency metric of each job executing in the computing cluster is calculated to generate a prioritized job queue. Accelerator re-grouping execution plans are then generated based on the prioritized job queue, the accelerator re-grouping execution plans associated with a target cluster topology to be achieved according to the placement of selected jobs from the prioritized job queue in relation to a location of respective ones of a plurality of accelerators within the computing cluster. One of the accelerator re-grouping execution plans is executed to allocate the selected jobs to the respective ones of the plurality of accelerators to thereby shift the computing cluster to the target cluster topology.

Dynamic accelerator scheduling and grouping for deep learning jobs in a computing cluster

Embodiments for leveraging directed acyclic graph (DAG) information to group tasks for execution, by at least one processor. An Input/Output (I/O) cost for each task in a set of tasks determined to be within a same input host set is determined, and tasks within the set of tasks are grouped into task groups according to an applied allocation time. The task groups are launched commensurate with a calculated delay time from each input host set so as to overlap I/O phases and central processing unit (CPU) phases to improve CPU efficiency. The launched task groups are executed by an executor according to the calculated delay time.

Leveraging directed acyclic graph (DAG) information to group tasks for execution

In at least one embodiment of stream processing in a data processing system cluster, a driver requests, from a cluster manager, execution of a first task within a job including a plurality of tasks, as well as a first quantity of resources of the cluster to support execution of the task. At completion of execution of the first task by the cluster, the driver retains for a second task among the plurality of tasks at least a portion of the resources allocated to the first task by the cluster manager. The driver determines a second quantity of the resources to retain for the second task based on a relative priority of the job to other jobs in the cluster and efficiency of the cluster manager in allocating resources to the first task.

Adaptive resource scheduling for data stream processing

Embodiments for graphical processing unit (GPU) resource sharing in a computing cluster, by a processor device. Resource-specific stages are dynamically generated in a directed acyclic graph (DAG) using a DAG interpreter for a set of tasks by creating equivalence stages in the DAG having an associated inserted set of shuffle stages, the equivalence stages created based on a determined cost of each stage of the set of shuffle stages. Backlog tasks are scheduled and tasks within the set of tasks are shifted among respective stages in the equivalence stages according to the determined cost to avoid overlapping allocation of the GPU resource during central processing unit (CPU) execution of the respective tasks of the set of tasks.

Cluster graphical processing unit (GPU) resource sharing efficiency by directed acyclic graph (DAG) generation

Embodiments of the present invention relate to CPU resource management in a computer cluster. A master node selects a CPU core of at least one compute node for an application from a computer cluster, and allocates a portion of resource of the CPU core to the application. The master node re-allocates a new portion of the resource of the CPU core to the application, in response to a trigger event for re-allocation.

CPU resource management in computer cluster

Embodiments for leveraging directed acyclic graph (DAG) information to group tasks for execution, by at least one processor device. For a set of tasks, an input host set is determined for each task using a shuffle type and hosts used during a previous stage, and the tasks in the set of tasks determined to be within a same input host set are classified together. An Input/Output (I/O) cost for each task in the set of tasks is calculated and tasks within the set of tasks are grouped into task groups according to an applied allocation time. The task groups are launched commensurate with a calculated delay time from each input host set so as to overlap I/O phases and central processing unit (CPU) phases to improve CPU efficiency, the launched task groups being executed by an executor according to the calculated delay time.

A mechanism is provided for thin provisioning. An original time-domain sequence of a load parameter of storage resources already allocated to an application program is collected. A future load peak time period of the storage resources already allocated to the application program is determined based on the collected original time-domain sequence of the load parameter. A new storage resource unit from a high-speed storage is allocated in response to receipt of a request to allocate the new storage resource unit to the application program in the future load peak time period. On an occasion of thin provisioning, whether the physical storage resources newly allocated to the application program are located in a low-speed storage or a high-speed storage is determined according to the accesses of the application program to the already-allocated physical storage resources.

Thin provisioning

Thin provisioning storage resources associated with an application program

An information handling system includes a multi-core processor that processes variable-length code (VLC) bitstream data. The bitstream data includes multiple codewords that the processor organizes into functionally common subsets. The processor includes a general purpose processor (GPU) and one or more special purpose processor (SPUs). An SPU of the processor may includes two SPU buffers. The processor first transfers bitstream data into GPU buffer memory and then populates the SPU buffers one after another with bitstream data. The SPU buffers may each include an overlap region that the SPU populates with the same bitstream data. The SPU parses the bitstream data in the SPU buffers in alternating fashion. The SPU may shift parsing from the one SPU buffer to the other SPU buffer when parsing reaches a subset boundary within an overlap region.

Variable-length code (VLC) bitstream parsing in a multi-core processor with buffer overlap regions

An information handling system includes a multi-core processor that processes variable-length code (VLC) bitstream data. The bitstream data includes multiple codewords for interpretation. The processor includes a general purpose unit (GPU) and a special purpose unit (SPU). The GPU includes GPU buffers and the SPU includes SPU buffers. After populating one GPU buffer with bitstream data, the processor populates another GPU buffer with subsequent bitstream data. The processor may populate the GPU buffers in alternating fashion. The processor populates one SPU buffer with bitstream data while parsing bitstream data in the other SPU buffer. The GPU of the processor populates the SPU buffers in alternating fashion. The size of the GPU buffers may be a multiple of the size of the SPU buffers. After the SPU buffers consume the bitstream data from one GPU buffer, the other GPU buffer transfers its bitstream data to the SPU buffers for parsing.

Asymmetric double buffering of bitstream data in a multi-core processor

The present invention provides an overlay instruction accessing unit and method, and a method and apparatus for compressing and storing a program. The overlay instruction accessing unit is used to execute a program stored in a memory in the form of a plurality of compressed program segments, and compresses: a buffer; a processing unit for issuing an instruction reading request, reading an instruction from the buffer, and executing the instruction; and a decompressing unit for reading a requested compressed instruction segment from the memory in response to the instruction reading request of the processing unit, decompressing the compressed instruction segment, and storing the decompressed instruction segment in the buffer, wherein while the processing unit is executing the instruction segment, the decompressing unit reads, according to a storage address of a compressed program segment to be invoked in a header corresponding to the instruction segment, a corresponding compressed instruction segment from the memory, decompresses the compressed instruction segment, and stores the decompressed instruction segment in the buffer for later use by the processing unit.

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Shanghai, China

Kuan Feng